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KSZ9567R 数据表(PDF) 11 Page - Microchip Technology |
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KSZ9567R 数据表(HTML) 11 Page - Microchip Technology |
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11 / 233 page  2022 Microchip Technology Inc. and its subsidiaries DS00002329E-page 11 KSZ9567R 3.2 Pin Descriptions This sections details the functions of the various device signals. TABLE 3-2: PIN DESCRIPTIONS NAME SYMBOL BUFFER TYPE DESCRIPTION Ports 5-1 Gigabit Ethernet Pins Port 5-1 Ethernet TX/RX Pair A + TXRX[5:1]P_A AIO Port 5-1 1000BASE-T Differential Data Pair A (+) Note: 100BASE-TX and 10BASE-Te are also sup- ported on the A and B pairs. Port 5-1 Ethernet TX/RX Pair A - TXRX[5:1]M_A AIO Port 5-1 1000BASE-T Differential Data Pair A (-) Note: 100BASE-TX and 10BASE-Te are also sup- ported on the A and B pairs. Port 5-1 Ethernet TX/RX Pair B + TXRX[5:1]P_B AIO Port 5-1 1000BASE-T Differential Data Pair B (+) Note: 100BASE-TX and 10BASE-Te are also sup- ported on the A and B pairs. Port 5-1 Ethernet TX/RX Pair B - TXRX[5:1]M_B AIO Port 5-1 1000BASE-T Differential Data Pair B (-) Note: 100BASE-TX and 10BASE-Te are also sup- ported on the A and B pairs. Port 5-1 Ethernet TX/RX Pair C + TXRX[5:1]P_C AIO Port 5-1 1000BASE-T Differential Data Pair C (+) Port 5-1 Ethernet TX/RX Pair C - TXRX[5:1]M_C AIO Port 5-1 1000BASE-T Differential Data Pair C (-) Port 5-1 Ethernet TX/RX Pair D + TXRX[5:1]P_D AIO Port 5-1 1000BASE-T Differential Data Pair D (+) Port 5-1 Ethernet TX/RX Pair D - TXRX[5:1]M_D AIO Port 5-1 1000BASE-T Differential Data Pair D (-) Ports 7-6 RGMII/MII/RMII Pins Port 7-6 Transmit/ Reference Clock TX_CLK[7:6]/ REFCLKI[7:6] I/O8 MII Mode: TX_CLK[7:6] is the Port 7-6 25/2.5MHz Trans- mit Clock. In PHY mode this pin is an output, in MAC mode it is an input. RMII Mode: REFCLKI[7:6] is the Port 7-6 50MHz Refer- ence Clock input when in RMII Normal mode. This pin is unused when in RMII Clock mode. RGMII Mode: TX_CLK[7:6] is the Port 7-6 125/25/2.5MHz Transmit Clock input. Port 7-6 Transmit Enable/Control TX_EN[7:6]/ TX_CTL[7:6] IPD MII/RMII Modes: TX_EN[7:6] is the Port 7-6 Transmit Enable. RGMII Mode: TX_CTL[7:6] is the Port 7-6 Transmit Con- trol. Port 7-6 Transmit Error TX_ER[7:6] IPD MII Mode: Port 7-6 Transmit Error input. RMII/RGMII Modes: Not used. Do not connect this pin in these modes of operation. |
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