KSZ9567R_V01 datasheet(80/233 Pages) MICROCHIP

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KSZ9567R

DS00002329E-page 80

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5.1.2.8

LED2_0/LED2_1 Source Register

5.1.3

GLOBAL PHY CONTROL AND STATUS REGISTERS (0x0200 - 0x02FF)

5.1.3.1

Power Down Control 0 Register

5.1.3.2

LED Configuration Strap Register

Address:

0x0128 - 0x012B

Size:

32 bits

Bits

Description

Type

Default

31:4

RESERVED

0x0000000

LED2_1 Source

0 = LED2_1 outputs as LED/GPO (configured via the LED Override Register)

1 = LED2_1 outputs the PTP Trigger Output 1

R/W

LED2_0 Source

0 = LED2_0 outputs as LED/GPO (configured via the LED Override Register)

1 = LED2_0 outputs the PTP Trigger Output 0

R/W

1:0

RESERVED

00b

Address:

0x0201

Size:

8 bits

Bits

Description

Type

Default

7:6

RESERVED

00b

PLL Power Down

0 = Normal operation.

1 = Disable PLL. This may be used in combination with EDPD mode – see

below.

R/W

4:3

Power Management Mode

00 = Normal operation

01 = Energy Detect Power Down (EDPD) Mode

10 = Soft Power Down Mode

11 = invalid

R/W

00b

2:0

RESERVED

000b

Address:

0x0210 - 0x0213

Size:

32 bits

Bits

Description

Type

Default

31:10

RESERVED

0x000000

9:0

Configuration strap values of LED pins

[LED4_1, LED4_0, LED3_1, LED3_0, LED2_1, LED2_0, LED1_1, LED1_0]

Note 5-2

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