KSZ9567R_V01 datasheet(159/233 Pages) MICROCHIP

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DS00002329E-page 159

KSZ9567R

5.2.4.4

Port Priority 0 Ingress Limit Control Register

3:2

Ingress Limit Mode

These bits determine what kind of frames are limited and counted against

ingress rate limiting.

00 = Count and limit all frames

01 = Count and limit broadcast, multicast and flooded unicast frames only

10 = Count and limit broadcast and multicast frames only

11 = Count and limit broadcast frames only

R/W

00b

Count IFG Bytes

1 = Each frame’s minimum inter-frame gap (IFG) bytes (12 per frame) are

included in ingress rate limiting calculations

0 = IFG byte count is not included

R/W

Count Preamble Bytes

Not valid when PPS mode is enabled (bit 5)

1 = Each frame’s preamble bytes (8 per frame) are included in ingress rate

limiting calculations

0 = Preamble byte count is not included

R/W

Address:

0xN410

Port N: 1-7

Size:

8 bits

Bits

Description

Type

Default

RESERVED

6:0

Ingress Data Rate Limit for Priority 0 Frames

Reference Table 5-3 for code values.

Note that the update will not take effect until the Port Priority 7 Ingress Limit

Control Register is written.

R/W

0x00

TABLE 5-3:

DATA RATE SELECTION TABLE FOR INGRESS AND EGRESS RATE LIMITING

Code

10Mbps

100Mbps

1000Mbps

7 Bits,

Decimal

PPS

BPS

PPS

BPS

PPS

BPS

7d’0

19.2k

10Mbps

192k

100Mbps

1.92M

1000Mbps

7d’1 –

7d’10

1.92k * code

1Mbps * code

1.92k * code

1Mbps * code

19.2k * code

10Mbps *

code

7d’11 –

7d’100

–

10Mbps

1.92k * code

1Mbps * code

19.2k * code

10Mbps * code

7d’101

64kbps

640kbps

640

640kbps

7d’102

128

128kbps

128

1280kbps

1280

1280kbps

Bits

Description

Type

Default

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