KSZ9567R datasheet(190/233 Pages) MICROCHIP

190 / 233 page

KSZ9567R

DS00002329E-page 190

 2022 Microchip Technology Inc. and its subsidiaries

5.3.1.4

ALU Table Entry 1 Register

5.3.1.5

ALU Table Entry 2 Register

Address:

0x0420 - 0x0423

Size:

32 bits

Bits

Description

Type

Default

STATIC

1 = Entry is static and updated by a host processor; will not be aged out

0 = Entry is dynamically learned and aged

R/W

SRC FILTER

1 = Drop packet if source address match during source learning

0 = Don’t drop if source address match

R/W

DES FILTER

1 = Drop packet if destination address match during lookup

0 = Don’t drop if destination address match

R/W

28:26

PRIORITY (for static entries)

AGE COUNT (for dynamic entries)

>0 = Entry has been accessed or learned since last aging process. A default

value is reloaded every time the entry is learned or accessed. It is

decremented during aging process.

0 = Entry has not been accessed or learned since last aging process. Entry

is not valid if it’s not static.

R/W

0_00b

25:3

RESERVED

0x000000

2:0

MSTP

Multiple Spanning Tree Protocol group ID for matching

R/W

000b

Address:

0x0424 - 0x0427

Size:

32 bits

Bits

Description

Type

Default

OVERRIDE

1 = Enable overriding of port state

0 = Do not enable

R/W

30:7

RESERVED

0x000000

6:0

PORT FORWARD

Each bit corresponds to a device port.

Bit 0 is for port 1

Bit 1 is for port 2, etc.

1 = Forward to the corresponding port

0 = Do not forward to the corresponding port

R/W

0x00

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