KSZ9567R datasheet(197/233 Pages) MICROCHIP

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DS00002329E-page 197

KSZ9567R

5.3.5.2

ACL Table Write

Write the ACL table entry values to the Port ACL Access 0 Register through Port ACL Access F Register.

Write the Port ACL Byte Enable MSB Register and Port ACL Byte Enable LSB Register to select which registers

(Port ACL Access 0 Register through Port ACL Access F Register) are to be written into the ACL table.

Write to the Port ACL Access Control 0 Register with the table entry number in the ACL Index field, and the Write/

Read bit 4 set to one. This one write to this register initiates the write operation.

The Write Status bit in the Port ACL Access Control 0 Register may be polled to determine when the operation

is complete.

5.3.6

MANAGEMENT INFORMATION BASE (MIB) COUNTERS

There are 36 MIB counters per port. These counters accumulate a variety of statistics on ingress and egress traffic and

events for network management. They are accessed indirectly using the Port MIB Control and Status Register and Port

MIB Data Register. The Switch MIB Control Register provides global flush and freeze control of the MIB counters.

TABLE 5-6:

MIB COUNTERS

MIB

Index

MIB Counter

Size

(bits)

Description

0x00

RxHiPriorityByte

RX high priority octet count, including bad packets.

0x01

RxUndersizePkt

RX undersize packets with good CRC.

0x02

RxFragments

RX fragment packets with bad CRC, symbol errors or alignment errors.

0x03

RxOversize

RX oversize packets w/ good CRC (max: 1536 or 1522 bytes).

0x04

RxJabbers

RX packets longer than 1522 bytes with either CRC errors, alignment

errors or symbol errors (depends on max packet size setting); or RX

packets longer than 1916 bytes only.

0x05

RxSymbolError

RX packets with invalid data symbol; and legal preamble and packet

size.

0x06

RxCRCerror

RX packets between 64 and 1522 bytes in size, with an integral number

of bytes and a bad CRC.

(Upper limit depends on max packet size setting.)

0x07

RxAlighmentError

RX packets between 64 and 1522 bytes in size, with a non-integral

number of bytes and a bad CRC.

(Upper limit depends on max packet size setting.)

0x08

RxControl8808Pkts

MAC control frames received with 0x8808 in the EtherType field.

0x09

RxPausePkts

PAUSE frames received. PAUSE is defined as EtherType (0x8808), DA,

control opcode (0x0001), minimum 64 byte data length, and a valid CRC.

0x0A

RxBroadcast

RX good broadcast packets. Does not include erred broadcast packets

or valid multicast packets.

0x0B

RXMulticast

RX good multicast packets. Does not include MAC control frames, erred

multicast packets, or valid broadcast packets.

0x0C

RxUnicast

RX good unicast packets.

0x0D

Rx64Octets

RX packets (bad packets included) that are 64 bytes in length.

0x0E

Rx65to127Octets

RX packets (bad packets included) that are 65 to 127 bytes in length.

0x0F

Rx128to255Octets

RX packets (bad packets included) that are 128 to 255 bytes in length.

0x10

Rx256to511Octets

RX packets (bad packets included) that are 256 to 511 bytes in length.

0x11

Rx512to2023Octets

RX packets (bad packets included) that are 512 to 1023 bytes in length.

0x12

Rx1024to1522Octets

RX packets (bad packets included) that are 1024 to 1522 bytes in length.

0x13

Rx1523to2000Octets

RX packets (bad packets included) that are 1523 t0 2000 bytes in length.

0x14

Rx2001+Octets

RX packets (bad packets included) that are between 2001 bytes and the

upper limit in length.

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