KSZ9567R datasheet(156/233 Pages) MICROCHIP

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KSZ9567R

DS00002329E-page 156

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5.2.3

PORT N: PORT RGMII/MII/RMII CONTROL REGISTERS (0xN300 - 0xN3FF)

5.2.3.1

XMII Port Control 0 Register

Note 5-6

The default value of this field is determined by the LED1_1 configuration strap value. Refer to Section

3.2.1, "Configuration Straps," on page 16 for additional information.

5.2.3.2

XMII Port Control 1 Register

Address:

0xN300

Port N: 6-7

Size:

8 bits

Bits

Description

Type

Default

RESERVED

MAC Port Duplex

1 = Port MAC interface operates in full-duplex mode

0 = Port MAC interface operates in half-duplex mode

R/W

MAC Port Transmit Flow Control Enable

1 = Enable transmit flow control on this port

0 = Disable transmit flow control on this port

R/W

Note 5-6

MAC Port Speed 10/100

This bit is ignored if bit 6 in the XMII Port Control 1 Register selects 1000 Mb/

If bit 6 in the XMII Port Control 1 Register is one, then this bit determines the

port speed:

1 = Port operates at 100 Mb/s

0 = Port operates at 10 Mb/s

R/W

MAC Port Receive Flow Control Enable

1 = Enable receive flow control on this port

0 = Disable receive flow control on this port

R/W

Note 5-6

2:0

RESERVED

R/W

000b

Address:

0xN301

Port N: 6-7

Size:

8 bits

Bits

Description

Type

Default

RESERVED

R/W

Port Speed 1000

1 = RGMII operates at 10 or 100 Mb/s, as determined by bit 4 in the XMII Port

Control 0 Register

0 = RGMII operates at 1000 Mb/s

R/W

Note 5-7

RESERVED

R/W

RGMII Ingress Internal Delay (RGMII_ID_ig)

1 = Minimum 1.5 ns delay is added to ingress RGMII clock

0 = No delay is added

R/W

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