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STA538B 数据表(PDF) 34 Page - STMicroelectronics

部件名 STA538B
功能描述  2 x 1.3 W class-D amplifier with analog or digital input 2.0 multichannel digital audio processor with FFX
PDF  59 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA538B 数据表(HTML) 34 Page - STMicroelectronics

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I2C interface
STA538
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9.6
Write operation
Following the start condition the master sends a device select code with the R/W bit set to 0.
The STA538 acknowledges this and the writes to the byte of the internal address. After
receiving the internal byte address, the STA538 responds with an acknowledgement.
9.6.1
Byte write
In the byte-write mode the master sends one data byte. This is acknowledged by the
STA538. The master then terminates the transfer by generating a stop condition.
9.6.2
Multi-byte write
The multi-byte write modes can start from any internal address. The master generates a
stop condition which terminates the transfer.
9.7
Read operation
9.7.1
Current address byte read
Following the start condition the master sends a device select code with the R/W bit set
to 1. The STA538 acknowledges this and then responds by sending one byte of data. The
master then terminates the transfer by generating a stop condition.
9.7.2
Current address multi-byte read
The multi-byte read modes can start from any internal address. Sequential data bytes are
read from sequential addresses within the STA538. The master acknowledges each data
byte read and then generates a stop condition terminating the transfer.
9.7.3
Random address byte read
Following the start condition the master sends a device select code with the R/W bit set to 0.
The STA538 acknowledges this and then the master writes the internal address byte. After
receiving the internal byte address, the STA538 again responds with an acknowledgement.
The master then initiates another start condition and sends the device select code with the
R/W bit set to 1. The STA538 acknowledges this and then responds by sending one byte of
data. The master then terminates the transfer by generating a stop condition.



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