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STA538B 数据表(PDF) 48 Page - STMicroelectronics |
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STA538B 数据表(HTML) 48 Page - STMicroelectronics |
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48 / 59 page ![]() Registers STA538 48/59 PLLPFE PLL/POP-free configuration register Address: 0x18 Type: R/W Buffer: No Reset: 0x00 Description: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 PLL_BYP_UNL BICLK2PLL PLL_PWDN PFE1A PFE1B PFE2A PFE2B RESET_FAULT 7 PLL_BYP_UNL: PLL bypass: 0: PLL is not bypassed (default) 1: PLL is bypassed when not locked 6 BICLK2PLL: 0: default 1: BICLKI is input to PLL 5 PLL_PWDN: 0: default 1: PLL is put in power-down mode 4PFE1A: 0: default 1: POP-free resistances are connected to output 1A 3PFE1B: 0: default 1: POP-free resistances are connected to output 1B 2PFE2A: 0: default 1: POP-free resistances are connected to output 2A 1PFE2B: 0: default 1: POP-free resistances are connected to output 2B 0 RESET_FAULT: 0: default 1: fault signal in the i2c register POWST is reset |
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