STA538B datasheet(46/59 Pages) STMICROELECTRONICS

部件名	STA538B

功能描述	2 x 1.3 W class-D amplifier with analog or digital input 2.0 multichannel digital audio processor with FFX

PDF	59 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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Registers

STA538

46/59

PLLCFG0

PLL configuration register 0

Address:

0x14

Type:

R/W

Buffer:

Reset:

0x00

Description:

PLLCFG1

PLL configuration register 1

Address:

0x15

Type:

R/W

Buffer:

Reset:

0x00

Description:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PLL_DIRECT_

PROG

FRAC_CTRL

DITHER_DISABLE[1:0]

IDF[3:0]

7 PLL_DIRECT_PROG: PLL programming:

0: default

1: PLL is programmed according to the PLLCFG register settings

6 FRAC_CTRL:

0: default

1: PLL fractional-frequency synthesis is enabled

5:4 DITHER_DISABLE[1:0]:

00: default

MSB = 1: disables rectangular PDF dither input to SDM

LSB = 1: disables triangular PDF dither input to SDM

3:0 IDF[3:0]: PLL input division factor:

0000: IDF = 1 (default)

0001: IDF = 1

0010: IDF = 2

…

1111: IDF = 15

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

FRAC_INPUT[15:8]

7:0 FRAC_INPUT[15:8]: 16 bits are used to set the fractional part of PLL multiplication factor:

0000 0000: default

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