Circuit description

STV7622

10/32

5.5

Differential transmission mode: RSDS (BS1 = L, BS2 = H)

In differential transmission mode, data is transmitted on two wires, one line transmits the

data value, the other the inverted data. The logic level of the data is determined by the

difference between data and inverted data. Two DB inputs are needed for the transmission

of 1 data value. The sampling clocks, CLK1 and CLK2, as well as strobes STB1/ and STB2

are also transmitted differentially. Data is sampled on the rising and falling edges of the

clock.

In differential transmission operating mode, the biasing of the data input bus must be

carefully arranged to reduce static power consumption. In stand-by and non-active modes,

DB1, DB3, DB5, CLK1 and /STB1 should be set High to reduce bias current in the

differential input buffers.

For a High level, all differential pairs should be configured with DB1, DB3, DB5, CLK1 and

/STB1 High and with DB2, DB4, DB6, CLK2 and /STB2 Low.

When operating in differential transmission mode, a 100 ohm (1%) resistor termination must

be connected between:

q

DB1 and DB2

q

DB3 and DB4

q

DB5 and DB6

q

CLK1 and CLK2

q

STB1 and STB2

with each resistor placed as close as possible to the STV7622 itself.

Table 6.

2 x 3 x 32-bit data bus transmission - differential mode

BS2

B12

DIR

Input

CLK1 clock pulse number

Comment

Position

01

↑

01

↓

02

↑

…

31

↓

32

↑

32

↓

H

L

L

DB1

DB2

OUT

01

04

07

184

187

190

Left/Right

shift

DB3

DB4

02

05

08

185

188

191

DB5

DB6

03

06

09

186

189

192

H

L

H

DB1

DB2

OUT

190

187

184

07

04

01

Right/Left

shift

DB3

DB4

191

188

185

08

05

02

DB5

DB6

192

189

186

09

06

03