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ADIN1111CCPZ-R7 数据表(PDF) 25 Page - Analog Devices

部件名 ADIN1111CCPZ-R7
功能描述  Robust, Industrial, Low Power 10BASE-T1L Ethernet MAC-PHY
PDF  109 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADIN1111CCPZ-R7 数据表(HTML) 25 Page - Analog Devices

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Data Sheet
ADIN1111
ON-CHIP DIAGNOSTICS
analog.com
Rev. A | 25 of 109
design, product testing, as well as at installation in the system, and
during the lifetime of the system.
Signal-to-Noise Ratio and Bit Error Rate
There is a statistical relation between a communication channel
SNR and bit error rate (BER). The relation between white noise
SNR and 10BASE-T1L BER is shown in Figure 16.
Figure 16. Statistical Relation Between SNR and BER in 10BASE-T1L
The IEEE 802.3cg-2019 standard requires the 10BASE-T1L BER
≤ 10−9, in the presence of the relevant noise. For context, the
BER 10−9 means 1 bit error every 100 sec in continuous 10 Mbps
data, which translates to approximately an SNR of 20.0 dB on the
10BASE-T1L PHY as shown in Figure 16.
With an SNR of 21.0 dB, the BER must be 10−11, which is 1 bit error
every 10,000 sec or 2¾ hour, and with an SNR of 22.0 dB, the BER
must be 10−14, which is 1 bit error in 115 days. These examples
illustrate how the SNR relates to the reliability of the 10BASE-T1L
Ethernet.
There are always some errors in any data communication channel.
The communication protocols, implemented and operating above
the Ethernet physical layer, such as TCP/IP in general use cases,
or the specific protocols for industrial or building automation ensure
data integrity by frame repetition or error correction as appropriate
for a given application. However, the link quality and related error
rate of the physical layer must be kept at a certain level for reliable
connection. The acceptable error rate may be different in noncritical
monitoring compared to a time critical automation network or safety
application.
Mean Squared Error at PHY Slicer
The link quality monitoring inside the PHY is implemented as an
MSE measurement.
The 10BASE-T1L Ethernet uses PAM3 modulation—the data sent
over the cable is coded into symbols of three voltage levels.
Inside the receiver, after analog and digital signal processing, is
a device called a slicer, which makes the decisions whether the
incoming signal voltage level represents a +1, 0, or –1 symbol. An
ideal received and scaled signal is already at these exact levels.
However, the noise coupled to the Ethernet channel from various
sources affects the real signal.
The PHY measures, for each received symbol, an error between
the output of the slicer and the received signal already scaled to the
correct amplitude level as shown in Figure 17. The mean square
value of these errors is then calculated and reported in the PHY
MSE_VAL register.
There is a direct relation between the MSE and SNR.
SNR= 1MSE
(1)
SNRdB =−MSEdB
(2)
Figure 17. Error Between Ethernet PHY Slicer Input and Output
MSE Reading
The ADIN1100, ADIN1101, ADIN1110, ADIN1111, and ADIN2111
automatically measure the MSE in the background when the
10BASE-T1L link is active and makes it available in the MSE_VAL
register.
The MSE_VAL register can be read via the management interface
(MDIO or SPI) anytime. After power-up or reset, before the first link
is up, the MSE_VAL register value is zero. When the 10BASE-T1L
link is up, the MSE_VAL register is updated after each received
symbol (every 133 ns). When the link drops, the register still
updates. However, the MSE value is incorrect. Therefore, reading
and processing the MSE is logical only when the 10BASE-T1L link
is up.
The frequency of reading the MSE_VAL register is not limited,
and it can be read as often as the management interface allows.
Therefore, how often MSE_VAL must be read depends on how fast
the link quality is expected to be changing and on how often the link
quality needs to be assessed and reported or recorded in the end
system application.
An example of polling the link status and reading the MSE is as
follows:



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