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ADIN1111CCPZ-R7 数据表(PDF) 56 Page - Analog Devices

部件名 ADIN1111CCPZ-R7
功能描述  Robust, Industrial, Low Power 10BASE-T1L Ethernet MAC-PHY
PDF  109 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADIN1111CCPZ-R7 数据表(HTML) 56 Page - Analog Devices

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Data Sheet
ADIN1111
REGISTERS
analog.com
Rev. A | 56 of 109
Transmit Time Stamp Capture Register B (High)
Address: 0x12, Reset: 0x00000000, Name: TTSCBH
This field contains the upper 32 bits of the captured time stamp for when the requested frame was transmitted.
Table 57. Bit Descriptions for TTSCBH
Bits
Bit Name
Description
Reset
Access
[31:0]
TTSCH_B
Transmit Time Stamp B. Bits[63:32].
0x0
R
Transmit Time Stamp Capture Register B (Low)
Address: 0x13, Reset: 0x00000000, Name: TTSCBL
This field contains the lower 32 bits of the captured time stamp for when the requested frame was transmitted.
Table 58. Bit Descriptions for TTSCBL
Bits
Bit Name
Description
Reset
Access
[31:0]
TTSCL_B
Transmit Time Stamp B. Bits[31:0].
0x0
R
Transmit Time Stamp Capture Register C (High)
Address: 0x14, Reset: 0x00000000, Name: TTSCCH
This field contains the upper 32 bits of the captured time stamp for when the requested frame was transmitted.
Table 59. Bit Descriptions for TTSCCH
Bits
Bit Name
Description
Reset
Access
[31:0]
TTSCH_C
Transmit Time Stamp C. Bits[63:32].
0x0
R
Transmit Time Stamp Capture Register C (Low)
Address: 0x15, Reset: 0x00000000, Name: TTSCCL
This field contains the lower 32 bits of the captured time stamp for when the requested frame was transmitted.
Table 60. Bit Descriptions for TTSCCL
Bits
Bit Name
Description
Reset
Access
[31:0]
TTSCL_C
Transmit Time Stamp C. Bits[31:0].
0x0
R
MDIO Access Registers
Address: 0x20 to 0x27 (Increments of 1), Reset: 0x8C000000, Name: MDIOACCn
Use this register to access the PHY registers via the SPI to MDIO bridge.
Table 61. Bit Descriptions for MDIOACCn
Bits
Bit Name
Description
Reset
Access
31
MDIO_TRDONE
Transaction Done. This bit must be written to 0 by the SPI host to initiate an MDIO transaction. The
MAC-PHY sets this bit to 1 when the MDIO transaction has completed.
0x1
R/W



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