ST10F272M datasheet(31/175 Pages) STMICROELECTRONICS

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ST10F272M

Internal Flash memory

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5.4.3

Flash control register 1 low (FCR1L)

The Flash Control Register 1 Low (FCR1L), together with Flash Control Register 1 High

(FCR1H), is used to select the Sectors to Erase, or during any write operation to monitor the

status of each Sector and Bank.

5.4.4

Flash control register 1 high (FCR1H)

The Flash Control Register 1 High (FCR1H), together with Flash Control Register 1 Low

(FCR1L), is used to select the Sectors to Erase, or during any write operation to monitor the

status of each Sector and Bank.

During any erase operation, this bit is automatically set and gives the status of the Bank 0.

The meaning of B0Fy bit for Sector y of Bank 0 is given by the next Table 4 Banks (BxS) and

Sectors (BxFy) Status bits meaning. These bits are automatically reset at the end of an

erase operation if no errors are detected.

FCR1L (0x08 0004)

FCR

Reset value: 0000h

987

65432

Reserved

B0F7 B0F6 B0F5 B0F4 B0F3 B0F2 B0F1 B0F0

RSRSRS

RSRSRSRS

Table 9.

Flash control register 1 low

Bit

Name

Function

7:0

B0F[7:0]

Bank 0 IFlash Sectors 7-0 Status

These bits must be set during a Sector Erase operation to select the sectors to

erase in Bank 0. Moreover, during any erase operation, these bits are

automatically set and give the status of the eight sectors of Bank 0 (B0F7-B0F0).

The meaning of B0Fy bit for Sector y of Bank 0 is given by the next Table 4 Banks

(BxS) and Sectors (BxFy) Status bits meaning. These bits are automatically reset

at the end of a Write operation if no errors are detected.

FCR1H (0x08 0006)

FCR

Reset value: 0000h

987

65432

Reserved

B0S

Reserved

-RS

Table 10.

Flash control register 1 high

Bit

Name

Function

8B0S

Bank 0 Status (IFlash)

During any erase operation, this bit is automatically modified and gives the status

of the Bank 0. The meaning of B0S bit is given in the next Table 4 Banks (BxS)

and Sectors (BxFy) Status bits meaning. This bit is automatically reset at the end

of an erase operation if no errors are detected.

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