ST10F272M datasheet(40/175 Pages) STMICROELECTRONICS

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Internal Flash memory

ST10F272M

40/176

FDR0H

= 0x55AA;

/*Load Data in FDR0H*/

FDR1L

= 0xAA55;

/*Load Data in FDR1L*/

FDR1H

= 0xAA55;

/*Load Data in FDR1H*/

FCR0H

|= 0x8000;

/*Operation start*/

Double Word Program is always performed on the Double Word aligned on an even Word:

bit ADD2 of FARL is ignored.

Sector erase

Example: Sector Erase of sectors B0F1 and B0F0 of Bank 0 in IFlash Module.

FCR0H

|= 0x0800;

/*Set SER in FCR0H*/

FCR1L

|= 0x0003;

/*Set B0F1, B0F0*/

FCR0H

|= 0x8000;

/*Operation start*/

Suspend and resume

Word Program, Double Word Program, and Sector Erase operations can be suspended in

the following way:

FCR0H

|= 0x4000;

/*Set SUSP in FCR0H*/

Then the operation can be resumed in the following way:

FCR0H

|= 0x0800;

/*Set SER in FCR0H*/

FCR0H

|= 0x8000;

/*Operation resume*/

Before resuming a suspended Erase, FCR1H/FCR1L must be read to check if the Erase is

already completed (FCR1H = FCR1L = 0x0000 if Erase is complete). Original setup of

Select Operation bits in FCR0H/L must be restored before the operation resume, otherwise

the operation is aborted and bit RESER of FER is set.

Set protection

Example 1: Enable Write Protection of sectors B0F3-0 of Bank 0 in IFlash module.

FCR0H

|= 0x0100;

/*Set SPR in FCR0H*/

FARL

= 0xDFB4;

/*Load Add of register FNVWPIR in FARL*/

FARH

= 0x0008;

/*Load Add of register FNVWPIR in FARH*/

FDR0L

= 0xFFF0;

/*Load Data in FDR0L*/

FDR0H

= 0xFFFF;

/*Load Data in FDR0H*/

FCR0H

|= 0x8000;

/*Operation start*/

Example 2: Enable Access and Debug Protection.

FCR0H

|= 0x0100;

/*Set SPR in FCR0H*/

FARL

= 0xDFB8;

/*Load Add of register FNVAPR0 in FARL*/

FARH

= 0x0008;

/*Load Add of register FNVAPR0 in FARH*/

FDR0L

= 0xFFFC;

/*Load Data in FDR0L*/

FCR0H

|= 0x8000;

/*Operation start*/

Example 3: Disable in a permanent way Access and Debug Protection.

XFVTAUR0

= 0x0001;

/*Set TAUB in XFVTAUR0*/

FCR0H

|= 0x0100;

/*Set SPR in FCR0H*/

FARL

= 0xDFBC;

/*Load Add of register FNVAPR1L in FARL*/

FARH

= 0x0008;

/*Load Add of register FNVAPR1L in FARH*/

FDR0L

= 0xFFFE;

/*Load Data in FDR0L for clearing PDS0*/

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