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ST7LITE0XY0 数据表(PDF) 104 Page - STMicroelectronics |
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ST7LITE0XY0 数据表(HTML) 104 Page - STMicroelectronics |
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104 / 124 page ![]() ST7LITE0xY0, ST7LITESxY0 104/124 13.11 8-BIT ADC CHARACTERISTICS TA = -40°C to 85°C, unless otherwise specified Notes: 1. Unless otherwise specified, typical data are based on TA=25°C and VDD-VSS=5V. They are given only as design guide- lines and are not tested. 2. Data based on characterization results, not tested in production. 3. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than 10k Ω). Data based on characterization results, not tested in production. 4. The stabilization time of the AD converter is masked by the first tLOAD. The first conversion after the enable is then always valid. Figure 81. Typical Application with ADC Symbol Parameter Conditions Min Typ Max Unit fADC ADC clock frequency 4 MHz VAIN Conversion voltage range VSS VDD V RAIN External input resistor 10 1) k Ω CADC Internal sample and hold capacitor VDD=5V 3 pF tSTAB Stabilization time after ADC enable fCPU=8MHz, fADC=4MHz 0 2) µs tCONV Conversion time (tSAMPLE+tHOLD)3 tSAMPLE Sample capacitor loading time 4 1/fADC tHOLD Hold conversion time 8 AINx ST7XX VDD IL ±1 µA VT 0.6V VT 0.6V CADC 3pF VAIN RAIN 8-Bit A/D Conversion 2k Ω(max) CAIN |
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