AS3953B datasheet(19/65 Pages) AMSOSRAM

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AS3953B − Detailed Description

Figure 21:

TA(1) Byte Coding

Bit b8 set to ‘0’ codes possibility of having different data rates

for each direction.

TB(1): The interface byte TB(1) conveys information to define

the frame waiting time and the start-up frame guard time. The

interface byte TB(1) consists of two parts:

• The most significant half-byte b8 to b5 is called FWI and

codes frame waiting time (FWT).

• The least significant half byte b4 to b1 is called SFGI and

codes a multiplier value used to define the SFGT. The SFGT

defines a specific guard time needed by the PICC before

it is ready to receive the next frame after it has sent the

ATS. SFGI is coded in the range from 0 to 14. The value of

‘0’ indicates ‘No SFGT needed’.

• The SFGT bits are fixed to default value which is 0x0, while

the FWI bits are defined by configuration bits fwi<3:0>.

Figure below defines the coding of the TB(1) byte.

Figure 22:

TB(1) Byte Coding

•TC(1): The interface byte TC(1) specifies a parameter of

the protocol. The interface byte TC(1) consists of two

parts:

• The most significant bits b8 to b3 are set to 000000, all other

values are ‘RFU’.

• The bits b2 and b1 define which optional fields in the

prologue field are supported by the PICC. The PCD is

allowed to skip fields that are supported by the PICC. Bit

b2 indicates support of CID and b1 indicates support of

NAD. The AS3953B value is ‘10’ indicating “CID supported”

and “NAD not supported”.

MSB

LSB

Description

dr_sdr

dr_

picc_8

dr_

picc_4

dr_

picc_2

dr_

pcd_8

dr_

pcd_4

dr_

pcd_2

Coding of ATS byte TA(1)

DS (PICC to PCD)

DR (PCD to PICC)

MSB

LSB

Description

fwi<3>

fwi<2>

fwi<1>

fwi<0>

Coding of ATS byte TB(1)

FWI

SFGI

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