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ADBMS1818CSWAZ-R7 数据表(PDF) 4 Page - Analog Devices |
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ADBMS1818CSWAZ-R7 数据表(HTML) 4 Page - Analog Devices |
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4 / 92 page  Data Sheet ADBMS1818 SPECIFICATIONS analog.com Rev. B | 4 of 92 Specifications are at TA = 25°C, unless otherwise noted. The test conditions are V+ = 59.4 V and VREG = 5.0 V, unless otherwise noted. The ISOMD pin is tied to the V– pin, unless otherwise noted. ADC DC SPECIFICATIONS Table 1. Parameter Test Conditions/Comments Min Typ Max Unit Measurement Resolution 0.1 mV/Bit ADC Offset Voltage1 0.1 mV ADC Gain Error 1 0.01 % TME in Normal Mode C(n) to C(n–1), GPIO(n) to V– = 0 ±0.2 mV C(n) to C(n–1) = 2.0 ±2.6 mV C(n) to C(n–1), GPIO(n) to V– = 2.0, apply over the full specified temperature range ±2.8 mV C(n) to C(n–1) = 3.3 ±3.0 mV C(n) to C(n–1), GPIO(n) to V– = 3.3, apply over the full specified temperature range ±4.0 mV C(n) to C(n–1) = 4.2 ±3.8 mV C(n) to C(n–1), GPIO(n) to V– = 4.2, apply over the full specified temperature range ±4.8 mV C(n) to C(n–1), GPIO(n) to V– = 5.0 ±1 mV Sum of all cells, apply over the full specified temperature range ±0.05 ±0.35 % Internal temperature, T = maximum specified temperature ±5 °C VREG pin, apply over the full specified temperature range –1 –0.15 0 % VREF2 pin, apply over the full specified temperature range –0.05 0.05 0.20 % Digital supply voltage, VREGD, apply over the full specified temperature range –0.5 0.5 1.5 % TME in Filtered Mode C(n) to C(n–1), GPIO(n) to V– = 0 ±0.1 mV C(n) to C(n–1) = 2.0 ±1.6 mV C(n) to C(n–1), GPIO(n) to V– = 2.0, apply over the full specified temperature range ±1.8 mV C(n) to C(n–1) = 3.3 ±2.2 mV C(n) to C(n–1), GPIO(n) to V– = 3.3, apply over the full specified temperature range ±3.0 mV C(n) to C(n–1) = 4.2 ±2.8 mV C(n) to C(n–1), GPIO(n) to V– = 4.2, apply over the full specified temperature range ±3.8 mV C(n) to C(n–1), GPIO(n) to V– = 5.0 ±1 mV Sum of all cells, apply over the full specified temperature range ±0.05 ±0.35 % Internal temperature, T = maximum specified temperature ±5 °C VREG pin, apply over the full specified temperature range –1 –0.15 0 % VREF2 pin, apply over the full specified temperature range –0.05 0.05 0.20 % Digital supply voltage, VREGD, apply over the full specified temperature range –0.5 0.8 1.5 % TME in Fast Mode C(n) to C(n–1), GPIO(n) to V– = 0 ±2 mV C(n) to C(n–1), GPIO(n) to V– = 2.0, apply over the full specified temperature range ±6.5 mV C(n) to C(n–1), GPIO(n) to V– = 3.3, apply over the full specified temperature range ±8.5 mV C(n) to C(n–1), GPIO(n) to V– = 4.2, apply over the full specified temperature range ±12.5 mV C(n) to C(n–1), GPIO(n) to V– = 5.0 ±10 mV Sum of all cells, apply over the full specified temperature range ±0.15 ±0.5 % Internal temperature, T = maximum specified temperature ±5 °C VREG pin, apply over the full specified temperature range –1.5 –0.15 1 % |
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