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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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AX88772ALF 数据表(PDF) 31 Page - ASIX Electronics Corporation |
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AX88772ALF 数据表(HTML) 31 Page - ASIX Electronics Corporation |
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31 / 45 page  ASIX ELECTRONICS CORPORATION 31 AX88772A/AX88172A Low-pin-count USB 2.0 to 10/100M Fast Ethernet Controller 9.4.5 Station Management Timing Th Ts Tod Tclk Tcl Tclk Tcl Tch Tch MDC MDIO(asOUTPUT) MDIO(asINPUT) MAC mode with MII: MDC=Output Symbol Description Min Typ Max Unit Tclk MDC clock cycle time - 640 - ns Tch MDC clock high time - 320 - ns Tcl MDC clock low time - 320 - ns Tod MDC clock rising edge to MDIO output delay 0.5 - - Tclk Ts MDIO data input setup time 125 - - ns Th MDIO data input hold time 0 - - ns PHY/Dual-PHY mode with Reverse-MII/RMII: MDC=Input Symbol Description Min Typ Max Unit Tclk MDC clock cycle time - 320 - ns Tch MDC clock high time - 160 - ns Tcl MDC clock low time - 160 - ns Tod MDC clock rising edge to MDIO output delay 0 - 300 ns Ts MDIO data input setup time 10 - - ns Th MDIO data input hold time 10 - - ns |
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