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ADL6331ACCZB-R7 数据表(PDF) 35 Page - Analog Devices

部件名 ADL6331ACCZB-R7
功能描述  0.38 GHz to 15 GHz TxVGA
PDF  54 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADL6331ACCZB-R7 数据表(HTML) 35 Page - Analog Devices

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Data Sheet
ADL6331
BASIC CONNECTIONS
analog.com
Rev. B | 35 of 54
Figure 95. Basic Connections
Table 18. Basic Connections
Functional Blocks
Pin No.
Mnemonic
Description
Basic Connection
Chip Address Selection
1, 23, 24
CA2, CA1, CA0
SPI chip address selects
Chip address selection.
Ground
2, 5, 14, 16, 17
GND
Ground
Connect the GND pins to the ground of the
PCB.
RF Input
3, 4
RFINP, RFINN
RF differential input
50 Ω differential input. AC-coupled is al-
ways recommended.
Preprogrammed Mode
6, 13
ATTSEL1, ATTSEL0
Preprogrammed mode selection
MUXOUT
7
MUXOUT
Analog voltage output from the tempera-
ture sensor
Voltage measurement pin for reading chip
temperature. Leave as no connect when
not in use.
3.3 V
8 to 11
V33AMP1A, V33AMP1,
V33AMP2A, V33AMP2
Amplifier, analog supply voltage
Decouple Pin 8 to Pin 11 via 220 pF, 0.1
µF capacitors to ground. Ensure that the
decoupling capacitors are located close to
the pins.
Device Enable
12
ENP
Active-high for normal operation
Decouple Pin 22 via 220 pF, 0.1 µF capaci-
tors to ground. Ensure that the decoupling
capacitors are located close to the pin.
RF Output
15
RFOUT
RF single-ended output
50 Ω single-ended output. AC-coupled is
always recommended.
Serial Port
18
SDO
SPI data input
1.8 V to 3.3 V tolerant logic levels.
19
SDIO
SPI date input and output
1.8 V to 3.3 V tolerant logic levels.
20
SCLK
SPI clock
1.8 V to 3.3 V tolerant logic levels.
21
CSB
Active-low chip select
1.8 V to 3.3 V tolerant logic levels.
3.3 V
22
V33FUSE
Digital, DSA, and other bias voltage
EPAD
Exposed pad
Exposed pad
Exposed pad
Exposed Pad. The exposed pad must be
connected to ground for electrical and ther-
mal purposes.



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