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ADL6331ACCZB-R7 数据表(PDF) 7 Page - Analog Devices

部件名 ADL6331ACCZB-R7
功能描述  0.38 GHz to 15 GHz TxVGA
PDF  54 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADL6331ACCZB-R7 数据表(HTML) 7 Page - Analog Devices

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Data Sheet
ADL6331
SPECIFICATIONS
analog.com
Rev. B | 7 of 54
Table 2. Specifications (Continued)
Parameter
Test Conditions/Comments
Min
Typ
Max
Units
NF
7.4
dB
AMP1 Bypass Attenuation Mode2
IIP2L/IIP2H
Pin = +2 dBm/tone
62.6/N/A7
dBm
IIP3
Pin = +2 dBm/tone
27.0
dBm
IP1dB5
>10
dBm
NF
26.5
dB
Input Signal Frequency 12.0 GHz
Full Fixed Gain Mode1
OIP2L/OIP2H
Pin = −22 dBm/tone
48.7/N/A7
dBm
OIP3
Pin = −22 dBm/tone
27.8
dBm
OP1dB
10.3
dBm
NF
7.1
dB
AMP1 Bypass Mode2
IIP2L/IIP2H
Pin = +2 dBm/tone
63.4/N/A7
dBm
IIP3
Pin = +2 dBm/tone
26.2
dBm
IP1dB5
>10
dBm
NF
27.4
dB
INPUT/OUTPUT CHARACTERISTICS
Input Impedance
Differential
50
Ω
Input Return Loss
Differential
12.0
dB
Output Impedance
Single-ended
50
Ω
Output Return Loss
In band, includes output balun single-ended
12.0
dB
GAIN FLATNESS
1.0 to 12 GHz
In a 1 GHz bandwidth
0.5
dB
1.5 to 12 GHz
In a 3 GHz bandwidth
1.1
dB
DSA ATTENUATION
Range
24.0
dB
Step
Through SPI
1.0
dB
Differential Nonlinearity (DNL)
0
0.16
0.5
dB
SWITCHING TIME
1.0 dB step via ATTSEL pins
200
ns
DIGITAL LOGIC
Input Voltage
SCLK, SDO, SDIO, CSB, ENP, CA0, CA1, CA2, ATTSEL0,
ATTSEL1
High (VIH)
1.07
V
Low (VIL)
0.68
V
Input Current
High (IIH)
−100 μA
Low (IIL)
100
μA
Output Voltage
SDO, SDIO (3-wire SPI mode)
At 1.8 V
High (VOH)
Output high current (IOH) = −100 μA or −1 mA static load
1.5
V
Low (VOL)
Output low current (IOL) = 100 μA or 1 mA static load
0.2
V
At 3.3 V
VOH
IOH = −100 μA or −1 mA static load
2.7
V
VOL
IOL = 100 μA or 1 mA static load
0.2
V
POWER SUPPLY
V
Voltage
V33AMP1A
3.135 3.3
3.465 V



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