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FS32K142HAT0MLHT 数据表(PDF) 16 Page - NXP Semiconductors |
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FS32K142HAT0MLHT 数据表(HTML) 16 Page - NXP Semiconductors |
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16 / 84 page ![]() Table 6. Power mode transition operating behaviors (continued) Symbol Description Min. Typ. Max. Unit VLPS → RUN 8 — 17 μs STOP1 → RUN 0.07 0.075 0.08 μs STOP2 → RUN 0.07 0.075 0.08 μs VLPR → RUN 19 — 26 μs VLPR → VLPS 5.1 5.7 6.5 μs VLPS → VLPR 18.8 23 27.75 μs RUN → Compute operation 0.72 0.75 0.77 μs HSRUN → Compute operation 0.3 0.31 0.35 μs RUN → STOP1 0.35 0.38 0.4 μs RUN → STOP2 0.2 0.23 0.25 μs RUN → VLPS 0.3 0.35 0.4 μs RUN → VLPR 3.5 3.8 5 μs VLPS → Asynchronous DMA Wakeup 105 110 125 μs STOP1 → Asynchronous DMA Wakeup 1 1.1 1.3 μs STOP2 → Asynchronous DMA Wakeup 1 1.1 1.3 μs Pin reset → Code execution — 214 — μs NOTE HSRUN should only be used when frequencies in excess of 80 MHz are required. When using 80 MHz and below, RUN mode is the recommended operating mode. 4.7 Power consumption The following table shows the power consumption targets for the device in various mode of operations. Attached S32K1xx_Power_Modes _Configuration.xlsx details the modes used in gathering the power consumption data stated in the following table Table 7. For full functionality refer to table: Module operation in available power modes of the Reference Manual . General S32K1xx Data Sheet, Rev. 9, 09/2018 16 NXP Semiconductors |
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