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FS32K142HAT0MLHT 数据表(PDF) 46 Page - NXP Semiconductors

部件名 FS32K142HAT0MLHT
功能描述  S32K1xx Data Sheet
PDF  84 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

FS32K142HAT0MLHT 数据表(HTML) 46 Page - NXP Semiconductors

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Table 29. 12-bit ADC characteristics (3 V to 5.5 V)(VREFH = VDDA, VREFL = VSS)
Symbol
Description
Conditions 1
Min.
Typ.2
Max.
Unit
Notes
VDDA
Supply voltage
3
—
5.5
V
IDDA_ADC Supply current per ADC
—
1
—
mA
3
SMPLTS Sample Time
275
—
Refer to
the
Reference
Manual
ns
TUE4
Total unadjusted error
—
±4
±8
LSB5
6, 7, 8, 9
DNL
Differential non-linearity
—
±0.7
—
LSB5
6, 7, 8, 9
INL
Integral non-linearity
—
±1.0
—
LSB5
6, 7, 8, 9
1. All accuracy numbers assume the ADC is calibrated with VREFH=VDDA=VDD, with the calibration frequency set to less than
or equal to half of the maximum specified ADC clock frequency.
2. Typical values assume VDDA = 5.0 V, Temp = 25 °C, fADCK = 40 MHz, RAS=20 Ω, and CAS=10 nF unless otherwise stated.
3. The ADC supply current depends on the ADC conversion rate.
4. Represents total static error, which includes offset and full scale error.
5. 1 LSB = (VREFH - VREFL)/2N
6. The specifications are with averaging and in standalone mode only. Performance may degrade depending upon device
use case scenario. When using ADC averaging, refer to the Reference Manual to determine the most appropriate settings
for AVGS.
7. For ADC signals adjacent to VDD/VSS or XTAL/EXTAL or high frequency switching pins, some degradation in the ADC
performance may be observed.
8. All values guarantee the performance of the ADC for multiple ADC input channel pins. When using ADC to monitor the
internal analog parameters, assume minor degradation.
9. All the parameters in the table are given assuming system clock as the clocking source for ADC.
NOTE
• Due to triple bonding in lower pin packages like 32-QFN,
48-LQFP, and 64-LQFP degradation might be seen in ADC
parameters.
• When using high speed interfaces such as the QuadSPI,
SAI0, SAI1 or ENET there may be some ADC degradation
on the adjacent analog input paths. See following table for
details.
Pin name
TGATE purpose
PTE8
CMP0_IN3
PTC3
ADC0_SE11/CMP0_IN4
PTC2
ADC0_SE10/CMP0_IN5
PTD7
CMP0_IN6
PTD6
CMP0_IN7
PTD28
ADC1_SE22
PTD27
ADC1_SE21
ADC electrical specifications
S32K1xx Data Sheet, Rev. 9, 09/2018
46
NXP Semiconductors



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