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FS32K142HAT0MLHT 数据表(PDF) 39 Page - NXP Semiconductors |
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FS32K142HAT0MLHT 数据表(HTML) 39 Page - NXP Semiconductors |
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39 / 84 page ![]() Table 25. NVM reliability specifications (continued) Symbol Description Min. Typ. Max. Unit Notes When using FlexMemory feature : FlexRAM as Emulated EEPROM tnvmretee Data retention 5 — — years 4 nnvmwree16 nnvmwree256 Write endurance • EEPROM backup to FlexRAM ratio = 16 • EEPROM backup to FlexRAM ratio = 256 100 K 1.6 M — — — — writes writes 5, 6, 7 1. Data retention period per block begins upon initial user factory programming or after each subsequent erase. 2. Program and Erase for PFlash and DFlash are supported across product temperature specification in Normal Mode (not supported in HSRUN mode). 3. Cycling endurance is per DFlash or PFlash Sector. 4. Data retention period per block begins upon initial user factory programming or after each subsequent erase. Background maintenance operations during normal FlexRAM usage extend effective data retention life beyond 5 years. 5. FlexMemory write endurance specified for 16-bit and/or 32-bit writes to FlexRAM and is supported across product temperature specification in Normal Mode (not supported in HSRUN mode). Greater write endurance may be achieved with larger ratios of EEPROM backup to FlexRAM. 6. For usage of any EEE driver other than the FlexMemory feature, the endurance spec will fall back to the specified endurance value of the D-Flash specification (1K). 7. FlexMemory calculator tool is available at NXP web site for help in estimation of the maximum write endurance achievable at specific EEPROM/FlexRAM ratios. The “In Spec” portions of the online calculator refer to the NVM reliability specifications section of data sheet. This calculator is only applies to the FlexMemory feature. 6.3.2 QuadSPI AC specifications The following table describes the QuadSPI electrical characteristics. • Measurements are with maximum output load of 25 pF, input transition of 1 ns and pad configured with fastest slew settings (DSE = 1'b1). • I/O operating voltage ranges from 2.97 V to 3.6 V • While doing the mode transition (RUN -> HSRUN or HSRUN -> RUN ), the interface should be OFF. • Add 50 ohm series termination on board in QuadSPI SCK for Flash A to avoid loop back reflection when using in Internal DQS (PAD Loopback) mode. • QuadSPI trace length should be 3 inches. • For non-Quad mode of operation if external device doesn’t have pull-up feature, external pull-up needs to be added at board level for non-used pads. • With external pull-up, performance of the interface may degrade based on load associated with external pull-up. Memory and memory interfaces S32K1xx Data Sheet, Rev. 9, 09/2018 NXP Semiconductors 39 |
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