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FS32K142HAT0MLHT 数据表(PDF) 26 Page - NXP Semiconductors |
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FS32K142HAT0MLHT 数据表(HTML) 26 Page - NXP Semiconductors |
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26 / 84 page ![]() 3. The strong pad I/O pin is capable of switching a 50 pF load up to 40 MHz. 4. For refernce only. Run simulations with the IBIS model and custom board for accurate results. 5. Several I/O have both high drive and normal drive capability selected by the associated Portx_PCRn[DSE] control bit. All other GPIOs are normal drive only. For details refer to SK3K144_IO_Signal_Description_Input_Multiplexing.xlsx attached with the Reference Manual. 6. Measured at input V = VSS 7. Measured at input V = VDD 5.5 AC electrical specifications at 3.3 V range Table 13. AC electrical specifications at 3.3 V Range Symbol DSE Rise time (nS) 1 Fall time (nS) 1 Capacitance (pF) 2 Min. Max. Min. Max. tRFGPIO NA 3.2 14.5 3.4 15.7 25 5.7 23.7 6.0 26.2 50 20.0 80.0 20.8 88.4 200 tRFGPIO-HD 0 3.2 14.5 3.4 15.7 25 5.7 23.7 6.0 26.2 50 20.0 80.0 20.8 88.4 200 1 1.5 5.8 1.7 6.1 25 2.4 8.0 2.6 8.3 50 6.3 22.0 6.0 23.8 200 tRFGPIO-FAST 0 0.6 2.8 0.5 2.8 25 3.0 7.1 2.6 7.5 50 12.0 27.0 10.3 26.8 200 1 0.4 1.3 0.38 1.3 25 1.5 3.8 1.4 3.9 50 7.4 14.9 7.0 15.3 200 1. For reference only. Run simulations with the IBIS model and your custom board for accurate results. 2. Maximum capacitances supported on Standard IOs. However interface or protocol specific specifications might be different, for example for ENET, QSPI etc. . For protocol specific AC specifications, see respective sections. 5.6 AC electrical specifications at 5 V range Table 14. AC electrical specifications at 5 V Range Symbol DSE Rise time (nS)1 Fall time (nS) 1 Capacitance (pF) 2 Min. Max . Min. Max. tRFGPIO NA 2.8 9.4 2.9 10.7 25 5.0 15.7 5.1 17.4 50 17.3 54.8 17.6 59.7 200 tRFGPIO-HD 0 2.8 9.4 2.9 10.7 25 Table continues on the next page... I/O parameters S32K1xx Data Sheet, Rev. 9, 09/2018 26 NXP Semiconductors |
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