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ADS5271 数据表(PDF) 10 Page - Texas Instruments

部件名 ADS5271
功能描述  10-Bit, Octal-Channel ADC Up to 65MSPS
PDF  42 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

ADS5271 数据表(HTML) 10 Page - Texas Instruments

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background image
t
H1
t
SU1
t
H2
t
SU2
LCLK
N
LCLK
P
OUT
N
OUT
P
0
0
D0 D1
D2
D3
D4
D5
D6
D7
D8
D9
0
0
D0
D1
D2
D3 D4
D5
D6
D7
D8
D9
0
0
D0
D1
D2 D3
D4
D5
D6
D7
D8
D9
Sample n
Sample n+12
t
PROP
t (A)
D
12clockslatency
AnalogInput
ClockInput
6XADCLK
LCLK
N
LCLK
P
1XADCLK
ADCLK
N
ADCLK
P
SERIAL DATA
OUT
P
OUT
N
t
SAMPLE
Sample n+13
ADS5287
SBAS428D – JANUARY 2008 – REVISED JUNE 2012
www.ti.com
LVDS TIMING DIAGRAM
DEFINITION OF SETUP AND HOLD TIMES
tSU = min(tSU1, tSU2)
tH = min(tH1, tH2)
TIMING CHARACTERISTICS
(1)
ADS5287
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tA
Aperture delay
1.5
4.5
ns
Aperture delay variation
Channel-to-channel within the same device (3
σ)
±20
ps
tJ
Aperture jitter
400
fs
Time to valid data after coming out of
50
μs
COMPLETE POWER-DOWN mode
Time to valid data after coming out of PARTIAL
tWAKE
Wake-up time
POWER-DOWN mode (with clock continuing to
2
μs
run during power-down)
Time to valid data after stopping and restarting
40
μs
the input clock
Clock
Data latency
12
cycles
(1)
Timing parameters are ensured by design and characterization; not production tested.
10
Copyright © 2008–2012, Texas Instruments Incorporated



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