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WM8994ECS/R 数据表(PDF) 281 Page - Cirrus Logic

部件名 WM8994ECS/R
功能描述  Multi-channel Audio Hub CODEC for Smartphones
PDF  363 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

WM8994ECS/R 数据表(HTML) 281 Page - Cirrus Logic

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WM8994
Rev 4.6
281
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
output signal path has been configured, and before DC
offset cancellation is scheduled. This bit should be set with
at least 20us delay after HPOUT1L_ENA.
3
HPOUT1R_RMV
_SHORT
0
Removes HPOUT1R short
0 = HPOUT1R short enabled
1 = HPOUT1R short removed
For normal operation, this bit should be set as the final step
of the HPOUT1R Enable sequence.
2
HPOUT1R_OUT
P
0
Enables HPOUT1R output stage
0 = Disabled
1 = Enabled
For normal operation, this bit should be set to 1 after the DC
offset cancellation has been scheduled.
1
HPOUT1R_DLY
0
Enables HPOUT1R intermediate stage
0 = Disabled
1 = Enabled
For normal operation, this bit should be set to 1 after the
output signal path has been configured, and before DC
offset cancellation is scheduled. This bit should be set with
at least 20us delay after HPOUT1R_ENA.
Register 60h Analogue HP (1)
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R256 (0100h)
Chip
Revision
3:0
CHIP_REV [3:0]
Chip revision
Register 0100h Chip Revision
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R257 (0101h)
Control
Interface
15
1
Reserved - Do Not Change
6
SPI_CONTRD
0
Enable continuous read mode in SPI (3-wire/4-wire) modes
0 = Disabled
1 = Enabled
5
SPI_4WIRE
0
SPI control mode select
0 = 3-wire using bidirectional SDA
1 = 4-wire using SDOUT
4
SPI_CFG
0
SDA/SDOUT pin configuration
0 = CMOS
1 = Open Drain (SPI_4WIRE = 0)
1 = Wired ‘OR’ (SPI_4WIRE = 1)
2
AUTO_INC
1
Enables address auto-increment
(applies to 2-wire I2C mode only)
0 = Disabled
1 = Enabled
Register 0101h Control Interface



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