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WM8994ECS/R 数据表(PDF) 295 Page - Cirrus Logic

部件名 WM8994ECS/R
功能描述  Multi-channel Audio Hub CODEC for Smartphones
PDF  363 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

WM8994ECS/R 数据表(HTML) 295 Page - Cirrus Logic

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WM8994
Rev 4.6
295
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
1 = TDM enabled on DACDAT2
12
AIF2DAC_TDM_
CHAN
0
AIF2 receive (DAC) TDM Slot Select
0 = Slot 0
1 = Slot 1
11:10
AIF2DAC_BOO
ST [1:0]
00
AIF2 Input Path Boost
00 = 0dB
01 = +6dB (input must not exceed -6dBFS)
10 = +12dB (input must not exceed -12dBFS)
11 = +18dB (input must not exceed -18dBFS)
8
AIF2_MONO
0
AIF2 DSP Mono Mode
0 = Disabled
1 = Enabled
Note that Mono Mode is only supported when AIF2_FMT =
11. The number of BCLK cycles per LRCLK frame must be
less the 2 x AIF2 Word Length.
4
AIF2DAC_COM
P
0
AIF2 Receive Companding Enable
0 = Disabled
1 = Enabled
3
AIF2DAC_COM
PMODE
0
AIF2 Receive Companding Type
0 = µ-law
1 = A-law
2
AIF2ADC_COM
P
0
AIF2 Transmit Companding Enable
0 = Disabled
1 = Enabled
1
AIF2ADC_COM
PMODE
0
AIF2 Transmit Companding Type
0 = µ-law
1 = A-law
0
AIF2_LOOPBAC
K
0
AIF2 Digital Loopback Function
0 = No loopback
1 = Loopback enabled (ADCDAT2 data output is directly
input to DACDAT2 data input).
Register 0311h AIF2 Control (2)
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R786 (0312h)
AIF2
Master/Slave
15
AIF2_TRI
0
AIF2 Audio Interface tri-state
0 = AIF2 pins operate normally
1 = Tri-state all AIF2 interface pins
Note that pins not configured as AIF2 functions are not
affected by this register.
14
AIF2_MSTR
0
AIF2 Audio Interface Master Mode Select
0 = Slave mode
1 = Master mode
13
AIF2_CLK_FRC
0
Forces BCLK2, LRCLK2 and ADCLRCLK2 to be enabled
when all AIF2 audio channels are disabled.
0 = Normal
1 = BCLK2, LRCLK2 and ADCLRCLK2 always enabled in
Master mode
12
AIF2_LRCLK_F
RC
0
Forces LRCLK2 and ADCLRCLK2 to be enabled when all
AIF2 audio channels are disabled.
0 = Normal
1 = LRCLK2 and ADCLRCLK2 always enabled in Master
mode



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