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STDRIVE102HTR 数据表(PDF) 30 Page - STMicroelectronics |
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STDRIVE102HTR 数据表(HTML) 30 Page - STMicroelectronics |
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30 / 56 page  Figure 21. VDS monitoring example >VDS,th nFAULT EN Gate Drivers Driver x control signal driver turn on VDS on MOSFET x expected behavior Vrelease + All the power MOSFETs are turned off and the three phases are set in high impedance deglitch time VDS,th tdg(VDS) tEN,pulse_rel VDS monitoring protection FAULT latched Gate driver LOW Gate driver LOW FAULT released EN = 0 Operative Gate driver active Operative Gate driver active The example in Figure 21 shows how the VDS monitoring protection works. When the driver turns on, it is expected that the VDS of the respective MOSFET falls below the threshold (as shown by the dotted line). In case the VDS stays above the threshold VDS,th for a time longer than the deglitch time tdg(VDS), then the protection is triggered. The VDS monitoring protection stays latched until it is released, forcing the EN pin below the Vrelease voltage for a time longer than tEN,pulse_rel. The drivers are enabled again when the EN pin goes high. 5.3 Analog Front-End (AFE) The STDRIVE102BH integrates three operational amplifiers and three comparators (Figure 22), while the STDRIVE102H integrates one operational amplifier and two comparators (Figure 23). Figure 22. STDRIVE102BH AFE block diagram + OA_IN1P CREF Op-amp Comp to Control Logic OA_IN1N OA_O1 C_IN1 + - VDD VDD AGND AGND + OA_IN2P Op-amp Comp OA_IN2N OA_O2 C_IN2 + - VDD VDD AGND AGND + OA_IN3P Op-amp Comp OA_IN3N OA_O3 C_IN3 + - VDD VDD AGND AGND Deglitch filter tdg(COMP) to Control Logic Deglitch filter tdg(COMP) to Control Logic Deglitch filter tdg(COMP) STDRIVE102BH, STDRIVE102H Device description DS14545 - Rev 1 page 30/56 |
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