PM6641 datasheet(23/47 Pages) STMICROELECTRONICS

23 / 47 page

PM6641

Device description

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The chipset supply is able to source the following average and peak currents, , assuming

1 A peak-to-peak inductor current ripple:

The peak current and the inductor ripple must be carefully evaluated in order to choose the

right current limit protection; this feature is performed by sensing the internal high side

MOSFET current and can be decreased by inserting an external resistor between CSNS pin

and AGND (see Chapter 7.10: Peak current limit on page 31 for details).

Both rails are able to protect the load from Over-Voltage and Under-Voltage protection,

which avoid the output to be higher than 120% or lower than 60% of the nominal value (see

Chapter 7.11.1: Output over voltage on page 33 and Chapter 7.11.2: Output under voltage

on page 33 section for details).

When the EN_1S5 or EN_1S05 pin goes high the respective rail is turned on and the output

voltage soft-start is performed by slowly charging the rail output capacitor; this behavior is

achieved because the loop voltage reference is increased linearly from zero up to 0.8V (see

Chapter 7.6: Outputs Soft-Start on page 28 section for details). When the EN_1S5 or

EN_1S05 pin goes low, the respective rail output capacitor is discharged through internal

discharge MOSFET and, at the end of the capacitor discharge, the low side power MOSFET

is finally closed (see Chapter 7.7: Outputs Soft-End on page 29 section for details).

Each rail has a dedicated pin to assert if its output voltage is not in the power good window,

i.e. if the output voltage drops 10% below or rises 10% above the nominal regulated value.

These Power Good Signals (PG_1S5 and PG_1S05 pins) are open drain outputs, tied to

GND in the following conditions:

●

When the rail output voltage is outside +/- 10 % range from nominal value

●

When a protection (UV, OV, thermal) has been triggered

●

When the regulator is in soft-start.

The PG_1S5 and PG_1S05 pins can sink current up to 4 mA when it’s asserted low.

Table 9. Chipset supply currents

Chipset supply rail [V]

Average current [A]

Peak current [A]

1.5

3.0

1.05

2.1

4.0

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