PM6641 datasheet(26/47 Pages) STMICROELECTRONICS

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Device description

PM6641

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7.4

SW regulators pulse skipping and PWM mode

In order to enhance the light load efficiency each switching regulator enters the Pulse

Skipping algorithm when the output current sourced is too low. The threshold load current

which allows the regulator to enter the pulse skipping mode can be estimated with the

following formula: (Vi-Vo)/(2Lfsw)*Vo/Vi

Equation 4

When the load current is lower than IOmin value, the switching regulator begins to skip some

cycle, decreasing the effective switching frequency and, as a consequence, reducing the

switching losses. This mode of operation is guaranteed by the presence of the zero crossing

current comparator, the internal block which senses the inductor current and avoids this

current to becoming negative, in the normal operating condition.

The inductor current is allowed to become negative when the output voltage rises above the

+10% power good threshold. In this condition of output soft over voltage the zero crossing

current comparator is deactivated and the pulse skipping algorithm is replaced by the typical

PWM one; as a consequence each switching regulator can sink up to some hundreds

milliamps to decrease the output voltage to the nominal value.

Figure 29. SW regulators pulse skipping and PWM mode

Iomin

–

()

2Lf

()

------------------------

≈

-------

⋅

a) Pulse Skipping Mode

b) PWM Mode

Vout

Clock

a) Pulse Skipping Mode

b) PWM Mode

Vout

Clock

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