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FDMS8672AS 数据表(PDF) 24 Page - Texas Instruments |
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FDMS8672AS 数据表(HTML) 24 Page - Texas Instruments |
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24 / 43 page ![]() ADAPTIVE ZERO CROSSING CURRENT PROTECTION I OCL(DC) + IOCL(PEAK) * 0.5 I IND(RIPPLE) (5) I OCL(PEAK) + V OCL R SENSE (6) POWERGOOD OUTPUT DISCHARGE CONTROL TPS51222 SLUS908 – JANUARY 2009............................................................................................................................................................................................... www.ti.com TPS51222 has an adaptive zero crossing circuit which performs optimization of the zero inductor current detection at skip mode operation. This function pursues ideal low-side MOSFET turning off timing and compensates inherent offset voltage of the ZC comparator and delay time of the ZC detection circuit. It prevents SW-node swing-up caused by too late detection and minimizes diode conduction period caused by too early detection. As a result, better light load efficiency is delivered. TPS51222 has cycle-by-cycle overcurrent limiting control. If the inductor current becomes larger than the overcurrent trip level, TPS51222 turns off high-side MOSFET, turns on low-side MOSFET and waits for the next clock cycle. IOCL(PEAK) sets peak level of the inductor current. Thus, the dc load current at overcurrent threshold, IOCL(DC), can be calculated as follows; where • R SENSE is resistance of current sensing device • V (OCL) is the overcurrent trip threshold voltage In an overcurrent condition, the current to the load exceeds the current to the output capacitor thus the output voltage tends to fall down, and it ultimately crosses the undervoltage protection threshold and shutdown. The TPS51222 has powergood output for both switcher channels. The powergood function is activated after softstart has finished. If the output voltage becomes within ±5% of the target value, internal comparators detect power good state and the powergood signal becomes high after 1ms internal delay. If the output voltage goes outside of ±10% of the target value, the powergood signal becomes low after 1.5 µs internal delay. Apply voltage should be less than 6V and the recommended pull-up resistance value is from 100k Ω to 1MΩ. The TPS51222 discharges output when ENx is low. The TPS51222 discharges outputs using an internal MOSFET which is connected to CSNx and GND. The current capability of these MOSFETs is limited to discharge the output capacitor slowly. If ENx becomes high during discharge, MOSFETs are turning off, and some output voltage remains. SMPS changes over to soft-start. The PWM initiates after the target voltage overtakes the remaining output voltage. 24 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS51222 |
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