6 Pin Configuration and Functions

1

VSS

12

VC1

2

SRN

11

VC2

3

SRP

10

PBI

4

TS1

9

CHG

5

SCL

8

PACK

6

SDA

7

DSG

Not to scale

Thermal

Pad

Figure 6-1. DRZ Package 12-Pin VSON Top View

Table 6-1. Pin Functions

PIN NUMBER PIN NAME

TYPE

DESCRIPTION

1

VSS

P(1)

Device ground

2

SRN

AI

Analog input pin connected to the internal coulomb counter peripheral for integrating a

small voltage between SRP and SRN where SRP is the top of the sense resistor.

3

SRP

AI

Analog input pin connected to the internal coulomb counter peripheral for integrating a

small voltage between SRP and SRN where SRP is the top of the sense resistor.

4

TS1

AI

Temperature input for ADC to the oversampled ADC channel, and optional Battery Trip

Point (BTP) output

5

SCL

I/O

Serial Clock for I2C interface; requires external pullup when used

6

SDA

I/O

Serial Data for I2C interface; requires external pullup

7

DSG

O

N-CH FET drive output pin

8

PACK

AI, P

Pack sense input pin

9

CHG

O

N-CH FET drive output pin

10

PBI

P

Power supply backup input pin

11

VC2

AI, P

Sense voltage input pin for most positive cell, balance current input for most positive cell.

Primary power supply input and battery stack measurement input (BAT)

12

VC1

AI

Sense voltage input pin for least positive cell, balance current input for least positive cell

PWPD

—

Exposed Pad, electrically connected to VSS (external trace)

(1)

P = Power Connection, O = Digital Output, AI = Analog Input, I = Digital Input, I/O = Digital Input/Output

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BQ28Z610-R1

SLUSE07B – JANUARY 2020 – REVISED JANUARY 2022

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