NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271)

.

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

EXAMPLE BOARD LAYOUT

4218895/B 03/2022

www.ti.com

VSON - 1 mm max height

DRZ0012A

PLASTIC QUAD FLATPACK- NO LEAD

SYMM

SYMM

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE: 20X

1

6

7

12

13

(R0.05) TYP

(Ø0.2) VIA

TYP

SOLDER MASK DETAILS

NON SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK

DEFINED

0.05 MAX

ALL AROUND

0.05 MIN

ALL AROUND

EXPOSED

METAL

METAL

SOLDER MASK

OPENING

EXPOSED

METAL

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

12X (0.6)

12X (0.2)

10X (0.4)

(3.8)

(2.45)

4X (0.2)

2X (2.25)

2X (0.725)

2X (0.975)

(2.9)

(1.95)

2X (2)