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CDCLVC1102, CDCLVC1103, CDCLVC1104

CDCLVC1106, CDCLVC1108, CDCLVC1110, CDCLVC1112

SCAS895B – MAY 2010 – REVISED FEBRUARY 2017

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Product Folder Links: CDCLVC1102 CDCLVC1103 CDCLVC1104 CDCLVC1106 CDCLVC1108 CDCLVC1110

CDCLVC1112

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Copyright © 2010–2017, Texas Instruments Incorporated

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report.

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-

standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

6.4 Thermal Information

THERMAL METRIC(1)

CDCLVC1102

CDCLVC1103

CDCLVC1104

CDCLVC1106

CDCLVC1108

CDCLVC11010

CDCLVC1112

UNIT

PW (TSSOP)

8 PINS

14 PINS

16 PINS

20 PINS

24 PINS

RθJA

Junction-to-ambient thermal

resistance(2)

149.4

112.6

108.4

83.0

87.9

°C/W

RθJC(top)

Junction-to-case(top) thermal

resistance (3)

69.4

48.0

33.6

32.3

26.5

°C/W

(1)

All typical values are at respective nominal VDD. For switching characteristics, outputs are terminated to 50 Ω to VDD/2 (see Figure 3).

(2)

For dynamic IDD over frequency see and Figure 1.

(3)

This is the formula for the power dissipation calculation (see and the Power Considerations section).

Ptot = Pstat + Pdyn + PCload [W]

Pstat = VDD × IDD [W]

Pdyn = CPD × VDD2 × ƒ [W]

PCload = Cload × VDD2 × ƒ × n [W]

n = Number of switching output pins

6.5 Electrical Characteristics

Over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN TYP(1)

MAX

UNIT

OVERALL PARAMETERS FOR ALL VERSIONS

IDD

Static device current(2)

1G = VDD; CLKIN = 0 V or VDD; IO = 0 mA; VDD = 3.6 V

6

10

mA

1G = VDD; CLKIN = 0 V or VDD; IO = 0 mA; VDD = 2.7 V

3

6

IPD

Power-down current

1G = 0 V; CLKIN = 0 V or VDD; IO = 0 mA; VDD = 3.6 V or 2.7 V

60

µA

CPD

Power dissipation capacitance

per output(3)

VDD = 3.3 V; f = 10 MHz

6

pF

VDD = 2.5 V; f = 10 MHz

4.5

II

Input leakage current at 1G

VI = 0 V or VDD, VDD = 3.6 V or 2.7 V

8

8

µA

Input leakage current at CLKIN

25

25

ROUT Output impedance

VDD = 3.3 V

45

Ω

VDD = 2.5 V

60

fOUT

Output frequency

VDD = 3 V to 3.6 V

DC

250

MHz

VDD = 2.3 V to 2.7 V

DC

180

OUTPUT PARAMETERS FOR VDD = 3.3 V ± 0.3 V

VOH

High-level output voltage

VDD = 3 V, IOH = –0.1 mA

2.9

V

VDD = 3 V, IOH = –8 mA

2.5

VDD = 3 V, IOH = –12 mA

2.2

VOL

Low-level output voltage

VDD = 3 V, IOL = 0.1 mA

0.1

V

VDD = 3 V, IOL = 8 mA

0.5

VDD = 3 V, IOL = 12 mA

0.8

OUTPUT PARAMETERS FOR VDD = 2.5 V ± 0.2 V

VOH

High-level output voltage

VDD = 2.3 V, IOH = –0.1 mA

2.2

V

VDD = 2.3 V, IOH = –8 mA

1.7

VOL

Low-level output voltage

VDD = 2.3 V, IOL = 0.1 mA

0.1

V

VDD = 2.3 V, IOL = 8 mA

0.5