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STA326 数据表(PDF) 20 Page - STMicroelectronics |
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STA326 数据表(HTML) 20 Page - STMicroelectronics |
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20 / 64 page ![]() I2C bus specification STA326 20/64 DocID11531 Rev 9 6.3 Write operation Following the START condition the master sends a device select code with the RW bit set to 0. The STA326 acknowledges this and then the master writes the internal address byte. After receiving the internal byte address the STA326 again responds with an acknowledgement. Figure 14. I2C write procedure Byte write In the byte write mode the master sends one data byte. This is acknowledged by the STA326. The master then terminates the transfer by generating a STOP condition. Multi-byte write The multi-byte write modes can start from any internal address. Sequential data byte writes will be written to sequential addresses within the STA326. The master generating a STOP condition terminates the transfer. 6.4 Read operation Figure 15. I2C read procedure Current address byte read Following the START condition the master sends a device select code with the RW bit set to 1. The STA326 acknowledges this and then responds by sending one byte of data. The master then terminates the transfer by generating a STOP condition. Obsolete Product(s) - Obsolete Product(s) |
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