STA326 datasheet(30/64 Pages) STMICROELECTRONICS

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STA326

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DocID11531 Rev 9

7.4

Configuration register D (addr 0x03)

The STA326 features an internal digital high-pass filter for the purpose of DC Blocking. The

purpose of this filter is to prevent DC signals from passing through a DDX® amplifier. DC

signals can cause speaker damage.

By setting this bit to 1, the de-emphasis will be implemented on all channels. DSPB, bit D2

of CONFD (configuration register D), must be set to 0 for de-emphasis to function.

Setting the DSPB bit bypasses all the EQ and mixing functionality of the STA326 core.

Postscale functionality is an attenuation placed after the volume control and directly before

the conversion to PWM. Postscale can also be used to limit the maximum modulation index

and therefore the peak current. A setting of 1 in the PSL register will result in the use of the

value stored in channel 1 postscale for all three internal channels.

MME

ZDE

DRC

BQL

PSL

DSPB

DEMP

HPB

Table 25. High-pass filter bypass

Bit

R/W

RST

Name

Description

HPB

High-pass filter bypass bit.

0: AC coupling high pass filter enabled

1: AC coupling high pass filter disabled

Table 26. De-emphasis

Bit

R/W

RST

Name

Description

DEMP

De-emphasis:

0: no de-emphasis

1: de-emphasis

Table 27. DSP bypass

Bit

R/W

RST

Name

Description

DSPB

DSP bypass bit:

0: normal Operation

1: bypass of EQ and mixing functionality

Table 28. Postscale link

Bit

R/W

RST

Name

Description

PSL

Postscale link:

0: each channel uses individual postscale value

1: each channel uses channel 1 postscale value

Obsolete

Product(s)

- Obsolete

Product(s)

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