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M41TC8025CMC7F 数据表(PDF) 11 Page - STMicroelectronics |
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M41TC8025CMC7F 数据表(HTML) 11 Page - STMicroelectronics |
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11 / 41 page ![]() DocID022873 Rev 4 11/41 M41TC8025 Operation 2.2.6 READ mode In this mode the master reads the M41TC8025 slave after setting the slave address (see Table 3 on page 11). Following the WRITE mode control bit (R/W = 0) and the acknowledge bit, the word address 'An' is written to the on-chip address pointer. Next the START condition and slave address are repeated followed by the READ mode control bit (R/W = 1). At this point the master transmitter becomes the master receiver. The data byte which was addressed will be transmitted and the master receiver will send an acknowledge bit to the slave transmitter. The address pointer is only incremented on reception of an acknowledge clock. The M41TC8025 slave transmitter will now place the data byte at address An+1 on the bus, the master receiver reads and acknowledges the new byte and the address pointer is incremented to "An+2." (see Figure 7 on page 12). This cycle of reading consecutive addresses will continue until the master receiver sends a STOP condition to the slave transmitter. Once the address pointer reaches the register 0Fh, it will roll over to 00h automatically. Note: The address pointer rolling over is true both in READ mode and WRITE mode. An alternate READ mode may also be implemented whereby the master reads the M41TC8025 slave without first writing to the (volatile) address pointer. The first address that is read is the last one stored in the pointer (see Figure 8 on page 12). Note: If an undefined register address is selected by the master, the M41TC8025 address pointer will not change. For a read command, the undefined register address will not be acknowledged and the first address that is read is the last one stored in the pointer (the M41TC8025 works in the alternate read mode). For a write command, the undefined register address will not be acknowledged and the address pointer remains unchanged. Table 3. Slave address byte Command Slave address R/W Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Read (65h) 0 1 1 0 0 1 0 1 Write (64h) 0 1 1 0 0 1 0 0 MSB LSB Obsolete Product(s) - Obsolete Product(s) |
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