Operation

M41TC8025

24/41

DocID022873 Rev 4

2.7.3

Stopping the time update interrupt

Although the time update interrupt function cannot be fully stopped, if UIE=0, the time

update interrupt can be prevented.

Since RESET=1 will stop the clock divider below 4,096 Hz, both the one-second update and

one-minute update interrupts will be stopped.

2.7.4

Example operation of the time update interrupt

The time update interrupt example is given in Figure 14. The time update interrupt timing

sequence is given in Figure 15.

Figure 14. Example of time update interrupt operation

Note:

One-second update auto release time is 500 ms while one-minute auto release time is

7.8125 ms.

Figure 15. Time update interrupt timing sequence

1. The time update event occurs when the internal clock's value matches either the second update or the minute update

(selected by USEL bit).

2. When the time update occurs, the UF bit is set to 1.

3. Once UF=1, it remains until the user clears it to 0.

4. When the time update interrupt occurs, the IRQ pin output is driven low if UIE=1. If UIE=0 when a time update occurs, the

IRQ pin remains Hi-Z.

5. Each time an interrupt occurs, the IRQ pin output is driven low only up to time tRTN (fixed as 500 ms for the second update

and 7. 8125 ms for the minute update) after which it is automatically released to Hi-Z. The IRQ pin output is driven low

again when the next interrupt event occurs.

6. When the IRQ pin is low, it will be released to Hi-Z immediately when the UF bit is reset to 0.

7. When the IRQ pin is low, it will be released to Hi-Z immediately when the UIE bit is set to 0.

Obsolete

Product(s)

- Obsolete

Product(s)