M41TC8025CMC7F datasheet(23/41 Pages) STMICROELECTRONICS

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M41TC8025

Operation

Note:

All the timer update interrupt function related register bits are marked in bold.

2.7.1

Related registers

The USEL bit in register 0Dh is for the selection of either one-second or one-minute update

generating the interrupts. If USEL=0 (default value), one-second update interrupt is

selected. If USEL=1, one-minute update interrupt is selected.

The UF bit in register 0Eh is the time update interrupt flag. Once the time gets updated (one-

second or one-minute selected by USEL bit), the UF bit is set to 1 to indicate a time update

occurrence. Once UF=1, it will not be auto-cleared and relies on the user to reset it to 0.

Resetting the UF bit to 0 will release the IRQ pin from low to Hi-Z immediately, otherwise the

IRQ pin is auto-released after tRTN time specified in Table 18.

The UIE bit in register 0Fh is the interrupt enable bit. If the interrupt is enabled (UIE=1) and

there is a time update event, the IRQ pin will be pulled low. If the interrupt is disabled

(UIE=0), even when there is a time update event, the IRQ pin will remain Hi-Z. The UF bit

still can be set to 1 regardless of the status of the IRQ pin. Resetting the UIE bit to 0 while

IRQ is low will immediately release the IRQ pin (change to Hi-Z).

Note:

The IRQ pin auto-release time (tRTN) varies according to the selection of the interrupt.

When the source clock has been set to "second update" or "minute update", the timing of

both counting and interrupts is coordinated with the clock update timing.

Since RESET=1 will stop the clock chain below 4,096 Hz, both the one-second update and

one-minute update will be stopped.

2.7.2

Starting the time update interrupt

Once the M41TC8025 is powered on, the time update interrupt is turned on. According to

the selection of the USEL bit (one-second or one-minute update), the UF bit will be set once

there is a time update. The IRQ pin will be pulled low if it is enabled (bit UIE=1).

Table 17. Time update interrupt related register bits

Address

Function

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0Dh

Extension

TEST

WADA USEL

FSEL1 FSEL0 TSEL1 TSEL0

0Eh

Flag register

VLF

VDET

0Fh

Control register CSEL1 CSEL0

UIE

TIE

AIE

RESET

Table 18. Time update interrupt cycle selection

USEL

Time update interrupt cycle

Auto reset

time (tRTN)

Effect of RESET bit

One-second update (once per second)

500 ms

Does not operate when

RESET = 1

One-minute update (once per minute)

7.8125 ms

Obsolete

Product(s)

- Obsolete

Product(s)

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