LP5569 datasheet(21/93 Pages) TI2

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LP5569

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SNVSAP8A – JULY 2017 – REVISED SEPTEMBER 2017

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8.4 Device Functional Modes

8.4.1 Modes Of Operation

CP_LED_STARTUP: LED drivers are enabled. The device enters NORMAL after 300 µs (typical).

CP_ON:

Charge pump is enabled per CP_MODE bits, and charge-pump output voltage is within regulation

after 300 µs (typical).

CP_WAKEUP After the power-save condition is no longer met, the device enters the CP_WAKEUP state. The

device enters CP_LED_STARTUP after 100 µs (typical).

DISABLED: The device enters this state when logic receives POR or the EN/PWM pin is low for longer than 15

ms (typical). The internal logic is disabled in this state to minimize power consumption. The mode

changes to INITIALIZATION when a rising edge has been detected in the EN/PWM pin and TSD is

inactive.

INITIALIZATION: This state duration is 2 ms (typical). The device enters the OTP_READ–SRAM_INIT state if

VVIN is above the VUVLO level, and the temperature is below TSD. If VVIN is below VUVLO or TSD is

active, the device remains in INITIALIZATION unless EN/PWM is low for 15 ms (typical), then the

device enters the DISABLED mode.

INTERNAL POWER SHUTDOWN: In INTERNAL POWER SHUTDOWN mode, the internal LDO is shutdown.

NORMAL:

After startup has been completed the device enters the NORMAL mode. Users can drive LEDs and

execute programs in this mode.

OTP_READ - SRAM_INIT: The OTP_READ mode is followed by SRAM_INIT, which initializes SRAM. When

initialization is complete, the device enters the STANDBY state. If VIN is below VUVLO while in this

state, the device returns to INITIALIZATION.

POWER SAVE: In POWER SAVE mode, analog blocks are disabled to minimize power consumption. After the

power-save condition is no longer met, the device exits the POWER SAVE mode. See Automatic

Power-Save Mode section for further information.

SHUTDOWN: During shutdown, the charge-pump and LED drivers are disabled. The device enters the

shutdown state if disabled (chip_en = 0) or if a TSD fault is active. The device enters STANDBY

after 1 ms (typical).

STANDBY: The STANDBY mode is a low-power-consumption mode and is entered if the register bit chip_en is

zero and Reset is not active. Register and SRAM access is available via I2C.

START-UP: During a fault condition, device operation is halted, and the device waits in STARTUP mode until no

faults are present. UVLO detection returns the device to STARTUP from all states with the

exception of STANDBY, INITIALIZATION, and OTP_READ - SRAM_INIT.

LP5569 数据表(PDF) 21 Page - Texas Instruments

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