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LP5569 数据表(PDF) 40 Page - Texas Instruments |
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LP5569 数据表(HTML) 40 Page - Texas Instruments |
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40 / 93 page  40 LP5569 SNVSAP8A – JULY 2017 – REVISED SEPTEMBER 2017 www.ti.com Product Folder Links: LP5569 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Table 14. LP5569_MAP Registers (continued) ADDRESS ACRONYM REGISTER NAME SECTION 81h LED_FAULT1 LED [8] Fault Status Go 82h LED_FAULT2 LED [7:0] Fault Status Go 83h GENERAL_FAULT CP Cap, UVLO and TSD Fault Status Go Table 15. Register Access-Type Codes Access Type Code Description Read Type R R Read Write Type W W Write Reset or Default Value -n Value after reset or the default value 8.6.1.1 CONFIG Register (Address = 0h) [reset = 0h] CONFIG is shown in Figure 27 and described in Table 16. Return to Summary Table. Configuration Register Figure 27. CONFIG Register 7 6 5 4 3 2 1 0 RESERVED chip_en RESERVED R/W-0h R/W-0h R/W-0h Table 16. CONFIG Register Field Descriptions Bit Field Type Reset Description 7 RESERVED R/W 0h 6 chip_en R/W 0h 0 = LP5569 not enabled (default) 1 = LP5569 enabled 5–0 RESERVED R/W 0h Reserved 8.6.1.2 LED_ENGINE_CONTROL1 Register (Address = 1h) [reset = 0h] LED_ENGINE_CONTROL1 is shown in Figure 28 and described in Table 17. Return to Summary Table. LED Engine Control Register 1 Execution states are defined in this register, and they are only applicable when the corresponding mode register in LED_ENGINE_CONTROL2 is set to the run mode. Execution-state values may be written by the host in other modes, but the engine disregards the write until the mode changes to run mode. The fields in this register define how the program is executed out of SRAM: HOLD: The engine does not execute any instructions, but the program counter holds its current value unless overwritten by the host. This is the only state in which the PC can be written. STEP: Executes a single instruction, increments the PC, and then changes to the hold state. If the instruction is a ramp or wait, the engine waits for this instruction to complete before changing to the hold state. FREE RUN: The engine begins instruction execution from the current value of the PC. The program counter is reset to zero when its upper-limit value is reached at the top of SRAM memory. EXECUTE ONCE: Executes a single instruction and then changes to the hold state. The PC remains unaffected unless the instruction is a branch command, in which case it changes if the branch is taken. If the instruction is a ramp or wait, it waits for this instruction to complete before changing to hold state. |
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