LP5569 datasheet(35/93 Pages) TI2

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LP5569

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SNVSAP8A – JULY 2017 – REVISED SEPTEMBER 2017

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NAME

VALUE (d)

DESCRIPTION

int

No interrupt is sent. PWM register values remain intact.

Reset program counter value to 0 and send interrupt to processor by pulling the INT pin

down and setting the corresponding status bit high to notify that the program has ended.

PWM register values remain intact. Interrupts can be cleared by reading the interrupt bits in

STATUS/INTERRUPT register at address 3Ch.

reset

Reset program counter value to 0 and hold. PWM register values remain intact.

Reset program counter value to 0 and hold. PWM register values of the non-mapped

drivers remain. PWM register values of the mapped drivers are set to 0000 0000b.

8.5.2.6.5

TRIGGER and TRIG_CLEAR

The wait-for-trigger or send-a-trigger instruction can be used to synchronize operation between the program

execution engines. Sending a trigger instruction takes 16 32-kHz clock cycles and waiting for a trigger takes at

least 16 32-kHz clock cycles. The receiving engine stores the triggers that have been sent. Received triggers are

cleared by the wait-for-trigger instruction or trig_clear instruction. The wait-for-trigger instruction is executed until

all the defined triggers have been received. (Note: several triggers can be defined in the same instruction.) The

external-trigger input signal must stay low for at least two 32-kHz clock cycles to be executed. The trigger output

signal is three 32-kHz clock cycles long. The external trigger signal is active-low; for example, when a trigger is

sent or received, the pin is pulled to GND. Sending an external trigger is masked; that is, the device which has

sent the trigger does not recognize the trigger it sent. If send and wait external triggers are used on the same

instruction, the send external trigger is executed first, followed by the wait external trigger.

The trig_clear instruction clears pending triggers for a single execution engine. Use this instruction in each

execution engine at the beginning of program execution to clear any pending triggers. Pending triggers are

always cleared whenever the engine mode is in the disabled state or load program to SRAM (see SRAM

Memory).

NAME

VALUE (d)

DESCRIPTION

wait for trigger

0–31

Wait for trigger from the engine(s). Several triggers can be defined in the same instruction.

Bit [7]: Wait for trigger from engine 1.

Bit [8]: Wait for trigger from engine 2.

Bit [9]: Wait for trigger from engine 3.

Bit [12]: Wait for trigger from GPIO/TRIG/INT pin.

Bits [10] and [11] are not used.

send a trigger

0–31

Send a trigger to the engine(s). Several triggers can be defined in the same instruction.

Bit [1]: Send trigger to engine 1.

Bit [2]: Send trigger to engine 2.

Bit [3]: Send trigger to engine 3.

Bit [6]: Send trigger to GPIO/TRIG/INT pin.

Bits [4] and [5]: are not used.

8.5.2.6.6

JNE, JGE, JL, and JE

The LP5569 instruction set includes the following conditional jump instructions: jne (jump if not equal); jge (jump

if greater or equal); jl (jump if less); je (jump if equal). If the condition is true, a certain number of instructions are

skipped (that is, the program jumps forward to a location relative to the present location). If the condition is false,

the next instruction is executed.

NAME

VALUE (d)

DESCRIPTION

Number of

instructions to be

skipped if the

operation returns true.

0–31

The number of instructions to be skipped when the statement is true.

Note: value 0 means redundant code.

variable 1

0–3

Defines the variable to be used in the test:

0 = Local variable A

1 = Local variable B

2 = Global variable C

3 = Global variable D

LP5569 数据表(PDF) 35 Page - Texas Instruments

LP5569 数据表(HTML) 35 Page - Texas Instruments

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LP5569 数据表(PDF) 35 Page - Texas Instruments

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