Vin

(6V - 14V)

From

controller

To

controller

Vout

GND

16

1

18

19

20

17

15

14

8

7

12

10

4

2

6

11

3

9

5

13

HS Sense

BST

HS Gate

SW

VGG

LS Gate

PGND

CSP

CSN

AGND

Vin

V

DIS

GG

SRE Mode

RDLY

ILIM

BP3

I MON

FLT

SRE

PWM

UCD7232

PP

PAD

1mH, 1.2mW

CSD16322Q5

CSD16401Q5

768W

0.22mF

Opt

47mF

47mF

330mF

4.7uF

22mF

22mF

3.01W

0.5W

2200pF

8.06kW

10.0kW

31.6kW

1mF

0.1mF

1mF

C11

C2

C3

Q1

Q2

C4

L1

C5

R1

R8

R2

C7

C8

C9

C6

C12

R5

R6

R7

U1

C1

2.49kW

R4

2.49kW

R3

R9

R10

0 W (Opt)

0W (Opt )

R11

1 W

B0540W

D1

R12

1.65kW

UCD7232

SLUSAH3

– MAY 2011

www.ti.com

APPLICATION INFORMATION

EXAMPLE 20A POWER STAGE

A partial schematic of a 20A power conversion stage designed for 500kHz operation is shown in Figure 7.

Figure 7. Example 20A Power Stage

This power stage has been designed to operate with a nominal input voltage of 12V. It will perform well with input

voltages from 6V to 14V. The output voltage range is assumed to be 3.3V or lower. It has been configured to use

the internal VGG supply and operate strictly in synchronous mode. The controller and voltage feedback

components are not shown. This design works well with any of the UCD92xx family of Digital Power Controllers.

The first step in designing the power stage is selecting a nominal operating frequency. Lower switching

frequencies will reduce FET switching losses and driver gate currents, but will require higher inductor values to

keep inductor ripple current within reasonable values. Higher switching frequencies allow for smaller inductor

values, which likely reduces their physical size and DCR, but higher FET switching losses and gate drive power

may offset the efficiency gains achieved from reduced inductor DCR. 500kHz is a good starting point for power

stages in the 15A to 25A range.

INDUCTOR SELECTION

Once a switching frequency has been selected, an appropriate inductance value can now be selected. Ripple

current and saturation current are the two key parameters that drive inductor value selection. Ripple current is

the ac variation of the current through the inductor. It is superimposed on the average dc (load) current flowing

through the inductor. High values of ripple current cause increased core losses in the inductor, and require more

low ESR capacitance to keep the output ripple voltage to acceptable levels. Limit the inductor ripple current to

approximately 30% of the rated dc load current. The peak-to-peak ripple current in an inductor determined by the

voltage across the inductor, the time duration of that applied voltage, and the value of the inductor.

ΔIPP = VL × Δt / L

(10)

In a switching regulator, this equation can be rewritten to use the duty-cycle and switching frequency of the

high-side FET to calculate the ripple current.

ΔIPP = [(VIN – VOUT) × VOUT] / (VIN × FSW × L)

(11)

16

Copyright

© 2011, Texas Instruments Incorporated