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TLV70436DBVT.A 数据表(PDF) 19 Page - Texas Instruments |
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TLV70436DBVT.A 数据表(HTML) 19 Page - Texas Instruments |
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19 / 33 page ![]() t - Time - s 0 2000 4000 6000 8000 10000 0 -1 5 0 10 1 15 2 20 3 25 4 30 5 VIN COUT = 10 F dV/dt = 1.15V/ s VOUT(1mA) VOUT(50mA) Figure 8-9. Line Transient Response for New Chip t - Time - ms 0 0.5 1 1.5 2 2.5 3 3.5 4 0 1 5 2 10 3 15 4 20 5 25 6 30 7 IOUT = 50mA COUT = 10F dV/dt = 0.66V/ s VIN VOUT Figure 8-10. Dropout Exit Transient Response for New Chip 8.3 Best Design Practices Place at least one 0.47-µF capacitor as close as possible to the OUT and GND pins of the regulator. Do not connect the output capacitor to the regulator using a long, thin trace. Connect an input capacitor as close as possible to the IN and GND pins of the regulator for best performance. Do not exceed the absolute maximum ratings. www.ti.com TLV704 SBVS148F – SEPTEMBER 2010 – REVISED MARCH 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: TLV704 |
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