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TLV70436DBVT.A 数据表(PDF) 10 Page - Texas Instruments |
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TLV70436DBVT.A 数据表(HTML) 10 Page - Texas Instruments |
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10 / 33 page ![]() 6.5 Typical Characteristics (continued) at operating temperature TJ = 25°C, VIN = VOUT(NOM) + 1.0 V or 2.5 V (whichever is greater), IOUT = 1 mA, CIN = 1 µF, and COUT = 1 µF (unless otherwise noted) 8 7 6 5 4 3 2 1 0 100 1 k 10 k 100 k Frequency (Hz) V = 4.3 V V = 3.3 V C = 1 F IN OUT OUT m I = 50 mA OUT I = 1 mA OUT Figure 6-19. Output Spectral Noise Density vs Frequency for Legacy Chip f - Frequency - Hz 1x101 1x102 1x103 1x104 1x105 1x106 1x107 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 10 20 20 Integrated Noise from 200Hz to 100KHz 1mA : 473 VRMS 50mA : 565 VRMS 1mA 50mA Figure 6-20. Output Spectral Noise Density vs Frequency for New Chip V = 4.3 V V = 3.3 V C = 10 F T = +25 C IN OUT OUT m J ° I = 50 mA OUT I = 1 mA OUT 100 90 80 70 60 50 40 30 20 10 0 10 100 1 k 10 k 100 k 1 M 10 M Frequency (Hz) Figure 6-21. Power-Supply Ripple Rejection vs Frequency for Legacy Chip f - Frequency (Hz) 1x101 1x102 1x103 1x104 1x105 1x106 1x107 0 10 20 30 40 50 60 70 80 90 100 VIN = 4.3V VOUT = 3.3V COUT = 10F TJ = 25C 1mA 50mA Figure 6-22. Power-Supply Ripple Rejection vs Frequency for New Chip V = 3.3 V C = 10 F OUT OUT m R = 66 L W V IN V OUT 8 7 6 5 4 3 2 1 0 Time (2 ms/div) Figure 6-23. Power-Up, Power-Down for Legacy Chip t - Time - ms 0 2 4 6 8 10 12 14 16 18 20 22 0 1 2 3 4 5 6 7 8 VOUT VIN VOUT = 3.3V IOUT = 50mA COUT = 10F Figure 6-24. Power-Up, Power-Down for New Chip TLV704 SBVS148F – SEPTEMBER 2010 – REVISED MARCH 2023 www.ti.com 10 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TLV704 |
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