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TLV70436DBVT.A 数据表(PDF) 4 Page - Texas Instruments |
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TLV70436DBVT.A 数据表(HTML) 4 Page - Texas Instruments |
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4 / 33 page ![]() 6 Specifications 6.1 Absolute Maximum Ratings over operating temperature range (unless otherwise noted)(1) (2) MIN MAX UNIT Voltage VIN (for legacy chip only) –0.3 24 V VIN (for new chip only) –0.3 30 Voltage VOUT (for legacy chip only) –0.3 5.0 V Voltage VOUT (for fixed output new chip only) –0.3 2 × VOUT(typ) or VIN + 0.3 or 5.5 (whichever is lower) V Current Peak output current Internally limited Temperature Junction, TJ –40 150 °C Storage, Tstg –65 150 (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±500 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. TLV704 SBVS148F – SEPTEMBER 2010 – REVISED MARCH 2023 www.ti.com 4 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TLV704 |
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