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TUSB1002AI 数据表(PDF) 15 Page - Texas Instruments |
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TUSB1002AI 数据表(HTML) 15 Page - Texas Instruments |
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15 / 38 page ![]() 6.3 Feature Description 6.3.1 4-Level Control Inputs The TUSB1002A has (MODE, CFG1, CFG2, CH1_EQ1, CH1_EQ2, CH2_EQ1, and CH2_EQ2) 4-level inputs pins that are used to control the equalization gain and the output voltage swing dynamic range. These 4-level inputs use a resistor divider to help set the four valid levels and provide a wider range of control settings. These resistors together with the external resistor connection combine to achieve the desired voltage level. Table 6-1. 4-Level Control Pin Settings LEVEL SETTINGS 0 Option 1: Tie 1kΩ 5% to GND. Option 2: Tie directly to GND. R Tie 20kΩ 5% to GND. F Float (leave pin open) 1 Option 1: Tie 1kΩ 5% to VCC. Option 2: Tie directly to VCC. Note To conserve power, the TUSB1002A disables 4-level input’s internal pullup/pulldown resistors after the state of 4-level pins have been sampled on rising edge of EN. A change of state for any four level input pin is not applied to TUSB1002A until after EN pin transitions from low to high. 6.3.2 Linear Equalization With a linear equalizer, the TUSB1002A can electrically shorten a particular channel allowing for longer run lengths. USB Type A X in trace USB Type A X in trace TUSB1002A Y in trace USB Host USB Host Figure 6-1. Linear Equalizer With a TUSB1002A, a longer trace can be made to have similar insertion loss as a shorter trace. For example, a long trace of X + Y inches can be made to have similar loss characteristics of a shorter trace of X inches. The receiver equalization level for each channel is determined by the state of the CHx_EQ1 and CHx_EQ2 pins, where x = 1 or 2. www.ti.com TUSB1002A SLLSF63C – MARCH 2018 – REVISED JULY 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: TUSB1002A |
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