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TUSB1002AI 数据表(PDF) 21 Page - Texas Instruments |
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TUSB1002AI 数据表(HTML) 21 Page - Texas Instruments |
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21 / 38 page ![]() HOST_TXP HOST_TXN HOST_RXP HOST_RXN CH2_EQ1 CFG2 CH2_EQ2 HOST_DM HOST_DP R2 DNI C10 100 nF C11 100 nF VCC_3P3V C9 10 µF TUSB1002A 24-PIN RGE U1 1 MODE 7 RX1N 8 RX1P 9 GND 10 TX2N 11 TX2P 12 RX2P RX2N GND TX1P TX1N RSVD1 GND C2 C1 220 nF C6 C4 J1 USB3_TYPEA_CONNECTER VBUS 1 DM 2 DP 3 GND 4 SSRXN SSRXP 6 GND 7 SSTXN 8 SSTXP 9 SHIELD0 10 SHIELD1 11 1M C7 100 nF C8 0.001 µF USB_VBUS VCC_3P3V CONNECT TO USB3.1 HOST VCC_3P3V CFG1 CH1_EQ2 CH1_EQ1 19 20 21 22 23 24 25 VCC_3P3V 2 3 4 5 6 C3 C5 C12 330 nF C13 330 nF R1 R16 220 k R15 220 k Optional Optional Copyright © 2018, Texas Instruments Incorporated 5 220 nF 220 nF 220 nF 220 nF 220 nF Figure 7-2. Host Implementation Schematic The USB3.2 Dual channel operation is used in this example. Leave the mode pin floating (unconnected) when using this mode. The TUSB1002A compensates for channel loss in both the upstream (D to C) and downstream direction (A to B). This is done by configurable the CH1_EQ[2:1] and CH2_EQ[2:1] pins to the equalization setting that matches as close possible to the channel insertion loss. In this particular example, CH1_EQ[2:1] is for path A to B which is the channel between USB3.2 host and the TUSB1002A, and CH2_EQ[2:1] is for path C to D which is the channel between TUSB1002A and the USB3.2 receptacle. The TUSB1002A supports five levels of DC gain that are selected by the CFG[2:1] pins. Typically, the DC gain is set to 0dB but may need to be adjusted to correct any one of the following conditions: 1. Input VID too high resulting in VOD being greater than USB 3.2 defined swing. For this case, use a negative DC gain. 2. Input VID too low resulting in VOD being less than USB 3.2 defined swing. For this case, use a positive DC gain. 3. Low frequency discontinuities in the channel resulting in DC component of the signal clipping the vertical eye mask. For this case, use a positive DC gain. Assume in this example that the incoming VID is at the nominal defined USB3.2 range and the channel is linear across frequency. The CFG1 and CFG2 pins can both be left floating if these assumptions are true. In this particular example, the channel A-B has a trace length of 8 inches with a 4mil trace width. This particular channel has about 0.83dB per inch of insertion loss at 5GHz. This equates to approximately 6.7dB of loss for the entire 8 inches of trace. An additional 1.5dB of loss is added due to package of the USB3.2 Host, TUSB1002A, and the A/C coupling capacitor. This brings the entire channel loss at 5GHz to 6.7dB + 1.5dB = 8.2dB. A typical USB 3.1 host/device has around 3dB of transmitter de-emphasis. Transmitter de-emphasis pre-compensates for the loss of the output channel. With 3dB of de-emphasis, the total equalization required by the TUSB1002A is in the 5.2dB (8.2dB - 3dB) range. The channel A-B for this example is connected to the RX1P/N input of the device, therefore the CH1_EQ[2:1] pins are used to adjust the TUSB1002A RX1P/N equalization settings. Set the CH1_EQ[2:1] pins such that the TUSB1002A equalization is between 5dB and 8dB. www.ti.com TUSB1002A SLLSF63C – MARCH 2018 – REVISED JULY 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: TUSB1002A |
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