TUSB8041RGCT datasheet(37/49 Pages) TI2

37 / 49 page

TUSB8041

www.ti.com

SLLSEE4E – JUNE 2014 – REVISED JUNE 2016

Submit Documentation Feedback

10 Power Supply Recommendations

10.1 TUSB8041 Power Supply

VDD should be implemented as a single power plane, as should VDD33.

•

The VDD pins of the TUSB8041 supply 1.1 V (nominal) power to the core of the TUSB8041. This power rail

can be isolated from all other power rails by a ferrite bead to reduce noise.

•

The DC resistance of the ferrite bead on the core power rail can affect the voltage provided to the device due

to the high current draw on the power rail. The output of the core voltage regulator may need to be adjusted

to account for this or a ferrite bead with low DC resistance (less than 0.05 Ω) can be selected.

•

The VDD33 pins of the TUSB8041 supply 3.3 V power rail to the I/O of the TUSB8041. This power rail can be

isolated from all other power rails by a ferrite bead to reduce noise.

•

All power rails require a 10 µF capacitor or 1 µF capacitors for stability and noise immunity. These bulk

capacitors can be placed anywhere on the power rail. The smaller decoupling capacitors should be placed as

close to the TUSB8041 power pins as possible with an optimal grouping of two of differing values per pin.

10.2 Downstream Port Power

•

The downstream port power, VBUS, must be supplied by a source capable of supplying 5V and up to 900 mA

per port. Downstream port power switches can be controlled by the TUSB8041 signals. It is also possible to

leave the downstream port power always enabled.

•

A large bulk low-ESR capacitor of 22 µF or larger is required on each downstream port’s VBUS to limit in-rush

current.

•

The ferrite beads on the VBUS pins of the downstream USB port connections are recommended for both

ESD and EMI reasons. A 0.1µF capacitor on the USB connector side of the ferrite provides a low impedance

path to ground for fast rise time ESD current that might have coupled onto the VBUS trace from the cable.

10.3 Ground

It is recommended that only one board ground plane be used in the design. This provides the best image plane

for signal traces running above the plane. The thermal pad of the TUSB8041 and any of the voltage regulators

should be connected to this plane with vias. An earth or chassis ground is implemented only near the USB port

connectors on a different plane for EMI and ESD purposes.

TUSB8041RGCT 数据表(PDF) 37 Page - Texas Instruments

TUSB8041RGCT 数据表(HTML) 37 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49

数据表下载