TUSB8041RGCT datasheet(7/49 Pages) TI2

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TUSB8041

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SLLSEE4E – JUNE 2014 – REVISED JUNE 2016

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Pin Functions (continued)

I/O

DESCRIPTION

NAME

NO.

OVERCUR4z

I, PU

USB Port 4 Over-Current Detection. This pin is used to connect the over current output of the

downstream port power switch for Port 4.

0 = An over current event has occurred

1 = An over current event has not occurred

This pin can be left unconnected if power management is not implemented. If power

management is enabled, the external circuitry needed should be determined by the power

switch.

I2C/SMBUS Signals

SCL/SMBCLK

I/O, PD

I2C clock/SMBus clock. Function of pin depends on the setting of the SMBUSz input.

When SMBUSz = 1, this pin acts as the serial clock interface for an I2C EEPROM.

When SMBUSz = 0, this pin acts as the serial clock interface for an SMBus host.

Can be left unconnected if external interface not implemented.

SDA/SMBDAT

I/O, PD

I2C data/SMBus data. Function of pin depends on the setting of the SMBUSz input.

When SMBUSz = 1, this pin acts as the serial data interface for an I2C EEPROM.

When SMBUSz = 0, this pin acts as the serial data interface for an SMBus host.

Can be left unconnected if external interface not implemented.

SMBUSz/SS_SUSPEND

I/O, PU

I2C/SMBus mode select/SuperSpeed USB Suspend Status. The value of the pin is sampled

at the de-assertion of reset set I2C or SMBus mode as follows:

1 = I2C Mode Selected

0 = SMBus Mode Selected

Can be left unconnected if external interface not implemented.

After reset, this signal indicates the SuperSpeed USB Suspend status of the upstream port if

enabled through the Additional Feature Configuration register. When enabled a value of 1

indicates the connection is suspended.

Test and Miscellaneous Signals

FULLPWRMGMTz/

SMBA1/SS_UP

I/O, PD

Full power management enable/SMBus address bit 1/SuperSpeed USB Connection Status

Upstream port.

The value of the pin is sampled at the de-assertion of reset to set the power switch control

follows:

0 = Power switching and over current inputs supported

1 = Power switching and over current inputs not supported

Full power management is the ability to control power to the downstream ports of the

TUSB8041 using PWRCTL[4:1]/BATEN[4:1].

When SMBus mode is enabled using SMBUSz, this pin sets the value of the SMBus slave

address bit 1.

Can be left unconnected if full power management and SMBus are not implemented.

After reset, this signal indicates the SuperSpeed USB connection status of the upstream port

if enabled through the Additional Feature Configuration register. When enabled a value of 1

indicates the upstream port is connected to a SuperSpeed USB capable port.

Note: Power switching must be supported for battery charging applications.

PWRCTL_POL

I/O, PU

Power Control Polarity.

The value of the pin is sampled at the de-assertion of reset to set the polarity of

PWRCTL[4:1].

0 = PWRCTL polarity is active low

1 = PWRCTL polarity is active high

TUSB8041RGCT 数据表(PDF) 7 Page - Texas Instruments

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TUSB8041RGCT 数据表(PDF) 7 Page - Texas Instruments

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